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Handle #dbg_values in SROA.
This patch properly handles #dbg_values in SROA by making sure that any #dbg_values get moved to before a store just like the right alloca after an aggregate alloca is broken up.
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6 files changed

+523
-388
lines changed

6 files changed

+523
-388
lines changed

llvm/lib/Transforms/Scalar/SROA.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5002,10 +5002,20 @@ static void insertNewDbgInst(DIBuilder &DIB, DbgVariableRecord *Orig,
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BeforeInst->getIterator());
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return;
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}
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if (Orig->isDbgValue()) {
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DbgVariableRecord *DVR = DbgVariableRecord::createDbgVariableRecord(
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NewAddr, Orig->getVariable(), NewFragmentExpr, Orig->getDebugLoc());
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BeforeInst->getParent()->insertDbgRecordBefore(DVR,
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BeforeInst->getIterator());
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return;
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}
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if (!NewAddr->hasMetadata(LLVMContext::MD_DIAssignID)) {
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NewAddr->setMetadata(LLVMContext::MD_DIAssignID,
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DIAssignID::getDistinct(NewAddr->getContext()));
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}
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DbgVariableRecord *NewAssign = DbgVariableRecord::createLinkedDVRAssign(
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NewAddr, Orig->getValue(), Orig->getVariable(), NewFragmentExpr, NewAddr,
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Orig->getAddressExpression(), Orig->getDebugLoc());
@@ -5178,6 +5188,7 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) {
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};
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for_each(findDbgDeclares(Fragment.Alloca), RemoveOne);
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for_each(findDVRDeclares(Fragment.Alloca), RemoveOne);
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for_each(findDVRValues(Fragment.Alloca), RemoveOne);
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insertNewDbgInst(DIB, DbgVariable, Fragment.Alloca, FragmentExpr, &AI);
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}
@@ -5187,6 +5198,7 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) {
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// and the individual partitions.
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for_each(findDbgDeclares(&AI), MigrateOne);
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for_each(findDVRDeclares(&AI), MigrateOne);
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for_each(findDVRValues(&AI), MigrateOne);
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for_each(at::getAssignmentMarkers(&AI), MigrateOne);
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for_each(at::getDVRAssignmentMarkers(&AI), MigrateOne);
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@@ -5314,6 +5326,8 @@ bool SROA::deleteDeadInstructions(
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OldDII->eraseFromParent();
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for (DbgVariableRecord *OldDII : findDVRDeclares(AI))
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OldDII->eraseFromParent();
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for (DbgVariableRecord *OldDII : findDVRValues(AI))
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OldDII->eraseFromParent();
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}
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at::deleteAssignmentMarkers(I);

llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -582,6 +582,9 @@ rewriteSingleStoreAlloca(AllocaInst *AI, AllocaInfo &Info, LargeBlockInfo &LBI,
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DbgItem->eraseFromParent();
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} else if (DbgItem->getExpression()->startsWithDeref()) {
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DbgItem->eraseFromParent();
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} else if (DbgItem->isValueOfVariable()) {
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InsertDebugValueAtStoreLoc(DbgItem, Info.OnlyStore, DIB);
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DbgItem->eraseFromParent();
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}
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}
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};

llvm/test/DebugInfo/X86/sroa-after-inlining.ll

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,9 +35,11 @@
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; CHECK: _Z3barv
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; CHECK: %[[RESULT:.*]] = call i32 @_Z3foov
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; CHECK: llvm.dbg.value(metadata i32 %[[RESULT]], metadata [[METADATA_IDX1:![0-9]+]]
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; CHECK: llvm.dbg.value(metadata i32 %[[RESULT]], metadata [[METADATA_IDX2:![0-9]+]]
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; CHECK: ret
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; CHECK: DICompileUnit
40-
; CHECK: [[METADATA_IDX1]] = !DILocalVariable(name: "result"
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; CHECK: [[METADATA_IDX2]] = !DILocalVariable(name: "result"
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; CHECK: [[METADATA_IDX1]] = !DILocalVariable(name: "this"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
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; This test was obtained from swift source code and then automatically reducing it via Delta.
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; The swift source code was from the test test/DebugInfo/debug_scope_distinct.swift.
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; RUN: opt %s -S -p=sroa -o - | FileCheck %s
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; CHECK: [[SROA_5_SROA_21:%.*]] = alloca [7 x i8], align 8
7+
; CHECK-NEXT: tail call void @llvm.dbg.value(metadata ptr [[SROA_5_SROA_21]], metadata [[META59:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 72, 56)), !dbg [[DBG72:![0-9]+]]
8+
9+
; CHECK: tail call void @llvm.dbg.value(metadata ptr [[REG2:%[0-9]+]], metadata [[META54:![0-9]+]], metadata !DIExpression(DW_OP_deref)), !dbg [[DBG78:![0-9]+]]
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; CHECK-NEXT: tail call void @llvm.dbg.value(metadata ptr [[REG2:%[0-9]+]], metadata [[META56:![0-9]+]], metadata !DIExpression(DW_OP_deref)), !dbg [[DBG78]]
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; CHECK-NEXT: tail call void @llvm.dbg.value(metadata i64 0, metadata [[META57:![0-9]+]], metadata !DIExpression()), !dbg [[DBG78]]
12+
13+
; CHECK: [[SROA_418_SROA_COPYLOAD:%.*]] = load i8, ptr [[SROA_418_0_U1_IDX:%.*]], align 8, !dbg [[DBG78]]
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; CHECK-NEXT: tail call void @llvm.dbg.value(metadata i8 [[SROA_418_SROA_COPYLOAD]], metadata [[META59]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 8)), !dbg [[DBG72]]
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%T4main1TV13TangentVectorV = type <{ %T4main1UV13TangentVectorV, [7 x i8], %T4main1UV13TangentVectorV }>
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%T4main1UV13TangentVectorV = type <{ %T1M1SVySfG, [7 x i8], %T4main1VV13TangentVectorV }>
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%T1M1SVySfG = type <{ ptr, %Ts4Int8V }>
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%Ts4Int8V = type <{ i8 }>
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%T4main1VV13TangentVectorV = type <{ %T1M1SVySfG }>
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define hidden swiftcc void @"$s4main1TV13TangentVectorV1poiyA2E_AEtFZ"(ptr noalias nocapture sret(%T4main1TV13TangentVectorV) %0, ptr noalias nocapture dereferenceable(57) %1, ptr noalias nocapture dereferenceable(57) %2) #0 !dbg !44 {
22+
%7 = alloca %T4main1VV13TangentVectorV
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%8 = alloca %T4main1UV13TangentVectorV
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tail call void @llvm.dbg.value(metadata ptr %8, metadata !82, metadata !DIExpression()), !dbg !92
25+
tail call void @llvm.dbg.value(metadata ptr %1, metadata !54, metadata !DIExpression(DW_OP_deref)), !dbg !95
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tail call void @llvm.dbg.value(metadata ptr %2, metadata !56, metadata !DIExpression(DW_OP_deref)), !dbg !95
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tail call void @llvm.dbg.value(metadata i64 0, metadata !57, metadata !DIExpression()), !dbg !95
28+
%.u2 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %1, i32 0, i32 2
29+
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %8, ptr align 8 %.u2, i64 25, i1 false), !dbg !95
30+
%.s7 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %8, i32 0, i32 0
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%.s7.b = getelementptr inbounds %T1M1SVySfG, ptr %.s7, i32 0, i32 1
32+
%.s7.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s7.b, i32 0, i32 0
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%26 = load i8, ptr %.s7.b._value
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%.v9 = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %8, i32 0, i32 2
35+
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %7, ptr align 8 %.v9, i64 9, i1 false)
36+
%.s11 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %7, i32 0, i32 0
37+
%.s11.c = getelementptr inbounds %T1M1SVySfG, ptr %.s11, i32 0, i32 0
38+
%32 = load ptr, ptr %.s11.c
39+
ret void
40+
}
41+
!llvm.module.flags = !{ !7, !15}
42+
!7 = !{i32 2, !"Debug Info Version", i32 3}
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!15 = !{i32 1, !"Swift Minor Version", i8 0}
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!16 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !17, sdk: "MacOSX14.2.sdk")
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!17 = !DIFile(filename: "/Users/shubham/Development/apple/swift/test/IRGen/debug_scope_distinct.swift", directory: "/Users/shubham/Development/apple/build/Ninja-RelWithDebInfoAssert/swift-macosx-arm64/test")
46+
!44 = distinct !DISubprogram( unit: !16, retainedNodes: !53)
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!53 = !{}
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!54 = !DILocalVariable( scope: !44, flags: DIFlagArtificial)
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!56 = !DILocalVariable( scope: !44, flags: DIFlagArtificial)
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!57 = !DILocalVariable( scope: !44, flags: DIFlagArtificial)
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!74 = distinct !DISubprogram( unit: !16, retainedNodes: !81)
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!81 = !{}
53+
!82 = !DILocalVariable( scope: !74, flags: DIFlagArtificial)
54+
!91 = distinct !DILocation( scope: !44)
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!92 = !DILocation( scope: !74, inlinedAt: !91)
56+
!95 = !DILocation( scope: !44)

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