git clangformat

Author: WangJee

bolt/lib/Core/Relocation.cpp

@@ -236,8 +236,8 @@ static size_t getSizeForTypeRISCV(uint32_t Type) {
   case ELF::R_RISCV_GOT_HI20:
   case ELF::R_RISCV_TLS_GOT_HI20:
   case ELF::R_RISCV_TLS_GD_HI20:
-    // See extractValueRISCV for why this is necessary.
-    return 8;
+      // See extractValueRISCV for why this is necessary.
+      return 8;
   }
 }
 
@@ -471,12 +471,11 @@ static uint64_t extractValueRISCV(uint32_t Type, uint64_t Contents,
   case ELF::R_RISCV_GOT_HI20:
   case ELF::R_RISCV_TLS_GOT_HI20:
   case ELF::R_RISCV_TLS_GD_HI20:
-    // We need to know the exact address of the GOT entry so we extract the
-    // value from both the AUIPC and L[D|W]. We cannot rely on the symbol in the
-    // relocation for this since it simply refers to the object that is stored
-    // in the GOT entry, not to the entry itself.
-    return extractUImmRISCV(Contents & 0xffffffff) +
-           extractIImmRISCV(Contents >> 32);
+      // We need to know the exact address of the GOT entry so we extract the
+      // value from both the AUIPC and L[D|W]. We cannot rely on the symbol in the
+      // relocation for this since it simply refers to the object that is stored
+      // in the GOT entry, not to the entry itself.
+      return extractUImmRISCV(Contents & 0xffffffff) + extractIImmRISCV(Contents >> 32);
   case ELF::R_RISCV_PCREL_HI20:
   case ELF::R_RISCV_HI20:
     return extractUImmRISCV(Contents);
@@ -687,7 +686,7 @@ static bool isPCRelativeRISCV(uint32_t Type) {
   case ELF::R_RISCV_32_PCREL:
   case ELF::R_RISCV_TLS_GOT_HI20:
   case ELF::R_RISCV_TLS_GD_HI20:
-    return true;
+      return true;
   }
 }
 

bolt/lib/Rewrite/RewriteInstance.cpp

@@ -2901,12 +2901,10 @@ void RewriteInstance::handleRelocation(const SectionRef &RelocatedSection,
       // of sections and whose symbol address is not really what should be
       // encoded in the instruction). So we essentially disabled this check
       // for AArch64 and live with bogus names for objects.
-      assert((IsAArch64 || BC->isRISCV() || IsSectionRelocation ||
-              BD->nameStartsWith(SymbolName) ||
+      assert((IsAArch64 || BC->isRISCV() || IsSectionRelocation || BD->nameStartsWith(SymbolName) ||
               BD->nameStartsWith("PG" + SymbolName) ||
               (BD->nameStartsWith("ANONYMOUS") &&
-               (BD->getSectionName().starts_with(".plt") ||
-                BD->getSectionName().ends_with(".plt")))) &&
+               (BD->getSectionName().starts_with(".plt") || BD->getSectionName().ends_with(".plt")))) &&
              "BOLT symbol names of all non-section relocations must match up "
              "with symbol names referenced in the relocation");