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[ReachingDefAnalysis] Turn MBBReachingDefsInfo into a proper class (NFC) (#110432)
I'm trying to speed up the reaching def analysis by changing the underlying data structure. Turning MBBReachingDefsInfo into a proper class decouples the data structure and its users. This patch does not change the existing three-dimensional vector structure. --------- Co-authored-by: Nikita Popov <[email protected]>
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+65
-25
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2 files changed

+65
-25
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llvm/include/llvm/CodeGen/ReachingDefAnalysis.h

Lines changed: 44 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,50 @@ struct PointerLikeTypeTraits<ReachingDef> {
6565
}
6666
};
6767

68+
// The storage for all reaching definitions.
69+
class MBBReachingDefsInfo {
70+
public:
71+
void init(unsigned NumBlockIDs) { AllReachingDefs.resize(NumBlockIDs); }
72+
73+
unsigned numBlockIDs() const { return AllReachingDefs.size(); }
74+
75+
void startBasicBlock(unsigned MBBNumber, unsigned NumRegUnits) {
76+
AllReachingDefs[MBBNumber].resize(NumRegUnits);
77+
}
78+
79+
void append(unsigned MBBNumber, unsigned Unit, int Def) {
80+
AllReachingDefs[MBBNumber][Unit].push_back(Def);
81+
}
82+
83+
void prepend(unsigned MBBNumber, unsigned Unit, int Def) {
84+
auto &Defs = AllReachingDefs[MBBNumber][Unit];
85+
Defs.insert(Defs.begin(), Def);
86+
}
87+
88+
void replaceFront(unsigned MBBNumber, unsigned Unit, int Def) {
89+
assert(!AllReachingDefs[MBBNumber][Unit].empty());
90+
*AllReachingDefs[MBBNumber][Unit].begin() = Def;
91+
}
92+
93+
void clear() { AllReachingDefs.clear(); }
94+
95+
ArrayRef<ReachingDef> defs(unsigned MBBNumber, unsigned Unit) const {
96+
if (AllReachingDefs[MBBNumber].empty())
97+
// Block IDs are not necessarily dense.
98+
return ArrayRef<ReachingDef>();
99+
return AllReachingDefs[MBBNumber][Unit];
100+
}
101+
102+
private:
103+
/// All reaching defs of a given RegUnit for a given MBB.
104+
using MBBRegUnitDefs = TinyPtrVector<ReachingDef>;
105+
/// All reaching defs of all reg units for a given MBB
106+
using MBBDefsInfo = std::vector<MBBRegUnitDefs>;
107+
108+
/// All reaching defs of all reg units for all MBBs
109+
SmallVector<MBBDefsInfo, 4> AllReachingDefs;
110+
};
111+
68112
/// This class provides the reaching def analysis.
69113
class ReachingDefAnalysis : public MachineFunctionPass {
70114
private:
@@ -93,12 +137,6 @@ class ReachingDefAnalysis : public MachineFunctionPass {
93137
/// their basic blocks.
94138
DenseMap<MachineInstr *, int> InstIds;
95139

96-
/// All reaching defs of a given RegUnit for a given MBB.
97-
using MBBRegUnitDefs = TinyPtrVector<ReachingDef>;
98-
/// All reaching defs of all reg units for a given MBB
99-
using MBBDefsInfo = std::vector<MBBRegUnitDefs>;
100-
/// All reaching defs of all reg units for a all MBBs
101-
using MBBReachingDefsInfo = SmallVector<MBBDefsInfo, 4>;
102140
MBBReachingDefsInfo MBBReachingDefs;
103141

104142
/// Default values are 'nothing happened a long time ago'.

llvm/lib/CodeGen/ReachingDefAnalysis.cpp

Lines changed: 21 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,9 @@ static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg,
5050

5151
void ReachingDefAnalysis::enterBasicBlock(MachineBasicBlock *MBB) {
5252
unsigned MBBNumber = MBB->getNumber();
53-
assert(MBBNumber < MBBReachingDefs.size() &&
53+
assert(MBBNumber < MBBReachingDefs.numBlockIDs() &&
5454
"Unexpected basic block number.");
55-
MBBReachingDefs[MBBNumber].resize(NumRegUnits);
55+
MBBReachingDefs.startBasicBlock(MBBNumber, NumRegUnits);
5656

5757
// Reset instruction counter in each basic block.
5858
CurInstr = 0;
@@ -71,7 +71,7 @@ void ReachingDefAnalysis::enterBasicBlock(MachineBasicBlock *MBB) {
7171
// before the call.
7272
if (LiveRegs[Unit] != -1) {
7373
LiveRegs[Unit] = -1;
74-
MBBReachingDefs[MBBNumber][Unit].push_back(-1);
74+
MBBReachingDefs.append(MBBNumber, Unit, -1);
7575
}
7676
}
7777
}
@@ -97,7 +97,7 @@ void ReachingDefAnalysis::enterBasicBlock(MachineBasicBlock *MBB) {
9797
// Insert the most recent reaching definition we found.
9898
for (unsigned Unit = 0; Unit != NumRegUnits; ++Unit)
9999
if (LiveRegs[Unit] != ReachingDefDefaultVal)
100-
MBBReachingDefs[MBBNumber][Unit].push_back(LiveRegs[Unit]);
100+
MBBReachingDefs.append(MBBNumber, Unit, LiveRegs[Unit]);
101101
}
102102

103103
void ReachingDefAnalysis::leaveBasicBlock(MachineBasicBlock *MBB) {
@@ -122,7 +122,7 @@ void ReachingDefAnalysis::processDefs(MachineInstr *MI) {
122122
assert(!MI->isDebugInstr() && "Won't process debug instructions");
123123

124124
unsigned MBBNumber = MI->getParent()->getNumber();
125-
assert(MBBNumber < MBBReachingDefs.size() &&
125+
assert(MBBNumber < MBBReachingDefs.numBlockIDs() &&
126126
"Unexpected basic block number.");
127127

128128
for (auto &MO : MI->operands()) {
@@ -136,7 +136,7 @@ void ReachingDefAnalysis::processDefs(MachineInstr *MI) {
136136
// How many instructions since this reg unit was last written?
137137
if (LiveRegs[Unit] != CurInstr) {
138138
LiveRegs[Unit] = CurInstr;
139-
MBBReachingDefs[MBBNumber][Unit].push_back(CurInstr);
139+
MBBReachingDefs.append(MBBNumber, Unit, CurInstr);
140140
}
141141
}
142142
}
@@ -146,7 +146,7 @@ void ReachingDefAnalysis::processDefs(MachineInstr *MI) {
146146

147147
void ReachingDefAnalysis::reprocessBasicBlock(MachineBasicBlock *MBB) {
148148
unsigned MBBNumber = MBB->getNumber();
149-
assert(MBBNumber < MBBReachingDefs.size() &&
149+
assert(MBBNumber < MBBReachingDefs.numBlockIDs() &&
150150
"Unexpected basic block number.");
151151

152152
// Count number of non-debug instructions for end of block adjustment.
@@ -169,16 +169,16 @@ void ReachingDefAnalysis::reprocessBasicBlock(MachineBasicBlock *MBB) {
169169
if (Def == ReachingDefDefaultVal)
170170
continue;
171171

172-
auto Start = MBBReachingDefs[MBBNumber][Unit].begin();
173-
if (Start != MBBReachingDefs[MBBNumber][Unit].end() && *Start < 0) {
174-
if (*Start >= Def)
172+
auto Defs = MBBReachingDefs.defs(MBBNumber, Unit);
173+
if (!Defs.empty() && Defs.front() < 0) {
174+
if (Defs.front() >= Def)
175175
continue;
176176

177177
// Update existing reaching def from predecessor to a more recent one.
178-
*Start = Def;
178+
MBBReachingDefs.replaceFront(MBBNumber, Unit, Def);
179179
} else {
180180
// Insert new reaching def from predecessor.
181-
MBBReachingDefs[MBBNumber][Unit].insert(Start, Def);
181+
MBBReachingDefs.prepend(MBBNumber, Unit, Def);
182182
}
183183

184184
// Update reaching def at end of BB. Keep in mind that these are
@@ -234,7 +234,7 @@ void ReachingDefAnalysis::reset() {
234234

235235
void ReachingDefAnalysis::init() {
236236
NumRegUnits = TRI->getNumRegUnits();
237-
MBBReachingDefs.resize(MF->getNumBlockIDs());
237+
MBBReachingDefs.init(MF->getNumBlockIDs());
238238
// Initialize the MBBOutRegsInfos
239239
MBBOutRegsInfos.resize(MF->getNumBlockIDs());
240240
LoopTraversal Traversal;
@@ -247,10 +247,11 @@ void ReachingDefAnalysis::traverse() {
247247
processBasicBlock(TraversedMBB);
248248
#ifndef NDEBUG
249249
// Make sure reaching defs are sorted and unique.
250-
for (MBBDefsInfo &MBBDefs : MBBReachingDefs) {
251-
for (MBBRegUnitDefs &RegUnitDefs : MBBDefs) {
250+
for (unsigned MBBNumber = 0, NumBlockIDs = MF->getNumBlockIDs();
251+
MBBNumber != NumBlockIDs; ++MBBNumber) {
252+
for (unsigned Unit = 0; Unit != NumRegUnits; ++Unit) {
252253
int LastDef = ReachingDefDefaultVal;
253-
for (int Def : RegUnitDefs) {
254+
for (int Def : MBBReachingDefs.defs(MBBNumber, Unit)) {
254255
assert(Def > LastDef && "Defs must be sorted and unique");
255256
LastDef = Def;
256257
}
@@ -265,11 +266,11 @@ int ReachingDefAnalysis::getReachingDef(MachineInstr *MI,
265266
int InstId = InstIds.lookup(MI);
266267
int DefRes = ReachingDefDefaultVal;
267268
unsigned MBBNumber = MI->getParent()->getNumber();
268-
assert(MBBNumber < MBBReachingDefs.size() &&
269+
assert(MBBNumber < MBBReachingDefs.numBlockIDs() &&
269270
"Unexpected basic block number.");
270271
int LatestDef = ReachingDefDefaultVal;
271272
for (MCRegUnit Unit : TRI->regunits(PhysReg)) {
272-
for (int Def : MBBReachingDefs[MBBNumber][Unit]) {
273+
for (int Def : MBBReachingDefs.defs(MBBNumber, Unit)) {
273274
if (Def >= InstId)
274275
break;
275276
DefRes = Def;
@@ -299,7 +300,8 @@ bool ReachingDefAnalysis::hasSameReachingDef(MachineInstr *A, MachineInstr *B,
299300

300301
MachineInstr *ReachingDefAnalysis::getInstFromId(MachineBasicBlock *MBB,
301302
int InstId) const {
302-
assert(static_cast<size_t>(MBB->getNumber()) < MBBReachingDefs.size() &&
303+
assert(static_cast<size_t>(MBB->getNumber()) <
304+
MBBReachingDefs.numBlockIDs() &&
303305
"Unexpected basic block number.");
304306
assert(InstId < static_cast<int>(MBB->size()) &&
305307
"Unexpected instruction id.");

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