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[X86] combineLogicBlendIntoConditionalNegate - convert to SDPatternMatch matching. NFC. (#144536)
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 5 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -47591,27 +47591,19 @@ static SDValue combineVSelectToBLENDV(SDNode *N, SelectionDAG &DAG,
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static SDValue combineLogicBlendIntoConditionalNegate(
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EVT VT, SDValue Mask, SDValue X, SDValue Y, const SDLoc &DL,
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SelectionDAG &DAG, const X86Subtarget &Subtarget) {
47594+
using namespace SDPatternMatch;
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EVT MaskVT = Mask.getValueType();
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assert(MaskVT.isInteger() &&
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DAG.ComputeNumSignBits(Mask) == MaskVT.getScalarSizeInBits() &&
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"Mask must be zero/all-bits");
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47599-
if (X.getValueType() != MaskVT || Y.getValueType() != MaskVT)
47600-
return SDValue();
47601-
if (!DAG.getTargetLoweringInfo().isOperationLegal(ISD::SUB, MaskVT))
47600+
if (X.getValueType() != MaskVT || Y.getValueType() != MaskVT ||
47601+
!DAG.getTargetLoweringInfo().isOperationLegal(ISD::SUB, MaskVT))
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return SDValue();
4760347603

47604-
auto IsNegV = [](SDNode *N, SDValue V) {
47605-
return N->getOpcode() == ISD::SUB && N->getOperand(1) == V &&
47606-
ISD::isBuildVectorAllZeros(N->getOperand(0).getNode());
47607-
};
47608-
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SDValue V;
47610-
if (IsNegV(Y.getNode(), X))
47611-
V = X;
47612-
else if (IsNegV(X.getNode(), Y))
47613-
V = Y;
47614-
else
47605+
if (!sd_match(Y, m_Neg(m_AllOf(m_Specific(X), m_Value(V)))) &&
47606+
!sd_match(X, m_Neg(m_AllOf(m_Specific(Y), m_Value(V)))))
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return SDValue();
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4761747609
SDValue SubOp1 = DAG.getNode(ISD::XOR, DL, MaskVT, V, Mask);

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