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KanRobertKanRobert
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[X86][CodeGen] Add entries for NDD SHLD/SHRD to the commuteInstructionImpl
1 parent c193bb7 commit 66237d6

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4 files changed

+56
-26
lines changed

4 files changed

+56
-26
lines changed

‎llvm/lib/Target/X86/X86CompressEVEX.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -200,7 +200,6 @@ static bool isRedundantNewDataDest(MachineInstr &MI, const X86Subtarget &ST) {
200200
!MI.getOperand(2).isReg() || MI.getOperand(2).getReg() != Reg0)
201201
return false;
202202
// Opcode may change after commute, e.g. SHRD -> SHLD
203-
// TODO: Add test for this after ND SHRD/SHLD is supported
204203
ST.getInstrInfo()->commuteInstruction(MI, false, 1, 2);
205204
return true;
206205
}

‎llvm/lib/Target/X86/X86InstrInfo.cpp

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2275,7 +2275,13 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
22752275
case X86::SHRD32rri8:
22762276
case X86::SHLD32rri8:
22772277
case X86::SHRD64rri8:
2278-
case X86::SHLD64rri8: {
2278+
case X86::SHLD64rri8:
2279+
case X86::SHRD16rri8_ND:
2280+
case X86::SHLD16rri8_ND:
2281+
case X86::SHRD32rri8_ND:
2282+
case X86::SHLD32rri8_ND:
2283+
case X86::SHRD64rri8_ND:
2284+
case X86::SHLD64rri8_ND: {
22792285
unsigned Size;
22802286
switch (Opc) {
22812287
default:
@@ -2304,6 +2310,30 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
23042310
Size = 64;
23052311
Opc = X86::SHRD64rri8;
23062312
break;
2313+
case X86::SHRD16rri8_ND:
2314+
Size = 16;
2315+
Opc = X86::SHLD16rri8_ND;
2316+
break;
2317+
case X86::SHLD16rri8_ND:
2318+
Size = 16;
2319+
Opc = X86::SHRD16rri8_ND;
2320+
break;
2321+
case X86::SHRD32rri8_ND:
2322+
Size = 32;
2323+
Opc = X86::SHLD32rri8_ND;
2324+
break;
2325+
case X86::SHLD32rri8_ND:
2326+
Size = 32;
2327+
Opc = X86::SHRD32rri8_ND;
2328+
break;
2329+
case X86::SHRD64rri8_ND:
2330+
Size = 64;
2331+
Opc = X86::SHLD64rri8_ND;
2332+
break;
2333+
case X86::SHLD64rri8_ND:
2334+
Size = 64;
2335+
Opc = X86::SHRD64rri8_ND;
2336+
break;
23072337
}
23082338
WorkingMI = CloneIfNew(MI);
23092339
WorkingMI->setDesc(get(Opc));

‎llvm/test/CodeGen/X86/apx/compress-evex.mir

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,16 @@ body: |
3232
RET64 $rax
3333
...
3434
---
35+
name: ndd_2_non_ndd_commutable_new_opcode
36+
body: |
37+
bb.0.entry:
38+
liveins: $rdi, $rsi
39+
; CHECK: shldq $52, %rsi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0xa4,0xf0,0x34]
40+
renamable $rax = ADD64rr_ND killed renamable $rdi, renamable $rsi, implicit-def dead $eflags
41+
renamable $rax = SHRD64rri8_ND killed renamable $rsi, killed renamable $rax, 12, implicit-def dead $eflags
42+
RET64 $rax
43+
...
44+
---
3545
name: ndd_2_non_ndd_incommutable
3646
body: |
3747
bb.0.entry:

‎llvm/test/CodeGen/X86/apx/shrd.ll

Lines changed: 15 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,7 @@ entry:
157157
define i16 @shrd16mri8(ptr %ptr, i16 noundef %b) {
158158
; CHECK-LABEL: shrd16mri8:
159159
; CHECK: # %bb.0: # %entry
160-
; CHECK-NEXT: shrdw $12, %si, (%rdi), %ax
160+
; CHECK-NEXT: shldw $4, %si, (%rdi), %ax
161161
; CHECK-NEXT: retq
162162
entry:
163163
%a = load i16, ptr %ptr
@@ -168,7 +168,7 @@ entry:
168168
define i32 @shrd32mri8(ptr %ptr, i32 noundef %b) {
169169
; CHECK-LABEL: shrd32mri8:
170170
; CHECK: # %bb.0: # %entry
171-
; CHECK-NEXT: shrdl $12, %esi, (%rdi), %eax
171+
; CHECK-NEXT: shldl $20, %esi, (%rdi), %eax
172172
; CHECK-NEXT: retq
173173
entry:
174174
%a = load i32, ptr %ptr
@@ -179,7 +179,7 @@ entry:
179179
define i64 @shrd64mri8(ptr %ptr, i64 noundef %b) {
180180
; CHECK-LABEL: shrd64mri8:
181181
; CHECK: # %bb.0: # %entry
182-
; CHECK-NEXT: shrdq $12, %rsi, (%rdi), %rax
182+
; CHECK-NEXT: shldq $52, %rsi, (%rdi), %rax
183183
; CHECK-NEXT: retq
184184
entry:
185185
%a = load i64, ptr %ptr
@@ -190,15 +190,13 @@ entry:
190190
define void @shrd16mrcl_legacy(ptr %ptr, i16 noundef %b, i8 %cl) {
191191
; CHECK-LABEL: shrd16mrcl_legacy:
192192
; CHECK: # %bb.0: # %entry
193-
; CHECK-NEXT: movzwl (%rdi), %eax
194193
; CHECK-NEXT: andb $15, %dl, %cl
195-
; CHECK-NEXT: shrdw %cl, %ax, %si, %ax
196-
; CHECK-NEXT: movw %ax, (%rdi)
194+
; CHECK-NEXT: shrdw %cl, %si, (%rdi)
197195
; CHECK-NEXT: retq
198196
entry:
199197
%a = load i16, ptr %ptr
200198
%clin = sext i8 %cl to i16
201-
%shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 %clin)
199+
%shrd = call i16 @llvm.fshr.i16(i16 %b, i16 %a, i16 %clin)
202200
store i16 %shrd, ptr %ptr
203201
ret void
204202
}
@@ -207,15 +205,13 @@ define void @shrd32mrcl_legacy(ptr %ptr, i32 noundef %b, i8 %cl) {
207205
; CHECK-LABEL: shrd32mrcl_legacy:
208206
; CHECK: # %bb.0: # %entry
209207
; CHECK-NEXT: movl %edx, %ecx
210-
; CHECK-NEXT: movl (%rdi), %eax
211208
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
212-
; CHECK-NEXT: shrdl %cl, %eax, %esi, %eax
213-
; CHECK-NEXT: movl %eax, (%rdi)
209+
; CHECK-NEXT: shrdl %cl, %esi, (%rdi)
214210
; CHECK-NEXT: retq
215211
entry:
216212
%a = load i32, ptr %ptr
217213
%clin = sext i8 %cl to i32
218-
%shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %clin)
214+
%shrd = call i32 @llvm.fshr.i32(i32 %b, i32 %a, i32 %clin)
219215
store i32 %shrd, ptr %ptr
220216
ret void
221217
}
@@ -224,54 +220,49 @@ define void @shrd64mrcl_legacy(ptr %ptr, i64 noundef %b, i8 %cl) {
224220
; CHECK-LABEL: shrd64mrcl_legacy:
225221
; CHECK: # %bb.0: # %entry
226222
; CHECK-NEXT: movl %edx, %ecx
227-
; CHECK-NEXT: movq (%rdi), %rax
228223
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
229-
; CHECK-NEXT: shrdq %cl, %rax, %rsi, %rax
230-
; CHECK-NEXT: movq %rax, (%rdi)
224+
; CHECK-NEXT: shrdq %cl, %rsi, (%rdi)
231225
; CHECK-NEXT: retq
232226
entry:
233227
%a = load i64, ptr %ptr
234228
%clin = sext i8 %cl to i64
235-
%shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %clin)
229+
%shrd = call i64 @llvm.fshr.i64(i64 %b, i64 %a, i64 %clin)
236230
store i64 %shrd, ptr %ptr
237231
ret void
238232
}
239233

240234
define void @shrd16mri8_legacy(ptr %ptr, i16 noundef %b) {
241235
; CHECK-LABEL: shrd16mri8_legacy:
242236
; CHECK: # %bb.0: # %entry
243-
; CHECK-NEXT: shrdw $12, %si, (%rdi), %ax
244-
; CHECK-NEXT: movw %ax, (%rdi)
237+
; CHECK-NEXT: shrdw $12, %si, (%rdi)
245238
; CHECK-NEXT: retq
246239
entry:
247240
%a = load i16, ptr %ptr
248-
%shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 12)
241+
%shrd = call i16 @llvm.fshr.i16(i16 %b, i16 %a, i16 12)
249242
store i16 %shrd, ptr %ptr
250243
ret void
251244
}
252245

253246
define void @shrd32mri8_legacy(ptr %ptr, i32 noundef %b) {
254247
; CHECK-LABEL: shrd32mri8_legacy:
255248
; CHECK: # %bb.0: # %entry
256-
; CHECK-NEXT: shrdl $12, %esi, (%rdi), %eax
257-
; CHECK-NEXT: movl %eax, (%rdi)
249+
; CHECK-NEXT: shrdl $12, %esi, (%rdi)
258250
; CHECK-NEXT: retq
259251
entry:
260252
%a = load i32, ptr %ptr
261-
%shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 12)
253+
%shrd = call i32 @llvm.fshr.i32(i32 %b, i32 %a, i32 12)
262254
store i32 %shrd, ptr %ptr
263255
ret void
264256
}
265257

266258
define void @shrd64mri8_legacy(ptr %ptr, i64 noundef %b) {
267259
; CHECK-LABEL: shrd64mri8_legacy:
268260
; CHECK: # %bb.0: # %entry
269-
; CHECK-NEXT: shrdq $12, %rsi, (%rdi), %rax
270-
; CHECK-NEXT: movq %rax, (%rdi)
261+
; CHECK-NEXT: shrdq $12, %rsi, (%rdi)
271262
; CHECK-NEXT: retq
272263
entry:
273264
%a = load i64, ptr %ptr
274-
%shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 12)
265+
%shrd = call i64 @llvm.fshr.i64(i64 %b, i64 %a, i64 12)
275266
store i64 %shrd, ptr %ptr
276267
ret void
277268
}

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