Minor code change; updated a todo comment; added testcases.

Author: Jun Wang

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -2665,7 +2665,7 @@ SDValue SITargetLowering::LowerFormalArguments(
 
   if (!IsKernel) {
     CCAssignFn *AssignFn = CCAssignFnForCall(CallConv, isVarArg);
-    if (!IsGraphics && !IsKernel && !Subtarget->enableFlatScratch()) {
+    if (!IsGraphics && !Subtarget->enableFlatScratch()) {
       CCInfo.AllocateRegBlock(ArrayRef<MCPhysReg>{AMDGPU::SGPR0, AMDGPU::SGPR1,
                                                   AMDGPU::SGPR2, AMDGPU::SGPR3},
                               4);

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

@@ -2550,6 +2550,7 @@ bool isArgPassedInSGPR(const Argument *A) {
     return A->hasAttribute(Attribute::InReg) ||
            A->hasAttribute(Attribute::ByVal);
   default:
+    // TODO: treat i1 as divergent?
     return A->hasAttribute(Attribute::InReg);
   }
 }

llvm/test/CodeGen/AMDGPU/function-args-inreg.ll

@@ -1711,6 +1711,98 @@ define void @too_many_args_use_workitem_id_x_inreg(
   ret void
 }
 
+define void @void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inreg %arg1) #0 {
+; GFX9-LABEL: void_func_i32_v2float_inreg:
+; GFX9:       ; %bb.0:
+; GFX9-NEXT:  s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT:  v_mov_b32_e32 v0, s4
+; GFX9-NEXT:  global_store_dword v[0:1], v0, off
+; GFX9-NEXT:  v_mov_b32_e32 v0, s5
+; GFX9-NEXT:  v_mov_b32_e32 v1, s6
+; GFX9-NEXT:  global_store_dwordx2 v[0:1], v[0:1], off
+; GFX9-NEXT:  s_waitcnt vmcnt(0)
+; GFX9-NEXT:  s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: void_func_i32_v2float_inreg:
+; GFX11:       ; %bb.0:
+; GFX11-NEXT:  s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT:  v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v1, s2
+; GFX11-NEXT:  v_mov_b32_e32 v0, s1
+; GFX11-NEXT:  s_clause 0x1
+; GFX11-NEXT:  global_store_b32 v[0:1], v2, off
+; GFX11-NEXT:  global_store_b64 v[0:1], v[0:1], off
+; GFX11-NEXT:  s_setpc_b64 s[30:31]
+  store i32 %arg0, ptr addrspace(1) undef
+  store <2 x float> %arg1, ptr addrspace(1) undef
+  ret void
+}
+
+define void @caller_void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inreg %arg1) #0 {
+; GFX9-LABEL: caller_void_func_i32_v2float_inreg:
+; GFX9:       ; %bb.0:
+; GFX9-NEXT:  s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT:  s_mov_b32 s7, s33
+; GFX9-NEXT:  s_mov_b32 s33, s32
+; GFX9-NEXT:  s_or_saveexec_b64 s[8:9], -1
+; GFX9-NEXT:  buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX9-NEXT:  s_mov_b64 exec, s[8:9]
+; GFX9-NEXT:  s_addk_i32 s32, 0x400
+; GFX9-NEXT:  s_getpc_b64 s[8:9]
+; GFX9-NEXT:  s_add_u32 s8, s8, caller_void_func_i32_v2float_inreg@gotpcrel32@lo+4
+; GFX9-NEXT:  s_addc_u32 s9, s9, caller_void_func_i32_v2float_inreg@gotpcrel32@hi+12
+; GFX9-NEXT:  s_load_dwordx2 s[8:9], s[8:9], 0x0
+; GFX9-NEXT:  v_writelane_b32 v40, s7, 2
+; GFX9-NEXT:  v_writelane_b32 v40, s30, 0
+; GFX9-NEXT:  s_mov_b32 s2, s6
+; GFX9-NEXT:  s_mov_b32 s1, s5
+; GFX9-NEXT:  s_mov_b32 s0, s4
+; GFX9-NEXT:  v_writelane_b32 v40, s31, 1
+; GFX9-NEXT:  s_waitcnt lgkmcnt(0)
+; GFX9-NEXT:  s_swappc_b64 s[30:31], s[8:9]
+; GFX9-NEXT:  v_readlane_b32 s31, v40, 1
+; GFX9-NEXT:  v_readlane_b32 s30, v40, 0
+; GFX9-NEXT:  v_readlane_b32 s4, v40, 2
+; GFX9-NEXT:  s_or_saveexec_b64 s[6:7], -1
+; GFX9-NEXT:  buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
+; GFX9-NEXT:  s_mov_b64 exec, s[6:7]
+; GFX9-NEXT:  s_addk_i32 s32, 0xfc00
+; GFX9-NEXT:  s_mov_b32 s33, s4
+; GFX9-NEXT:  s_waitcnt vmcnt(0)
+; GFX9-NEXT:  s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: caller_void_func_i32_v2float_inreg:
+; GFX11:      ; %bb.0:
+; GFX11-NEXT  s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT  s_mov_b32 s3, s33
+; GFX11-NEXT  s_mov_b32 s33, s32
+; GFX11-NEXT  s_or_saveexec_b32 s4, -1
+; GFX11-NEXT  scratch_store_b32 off, v40, s33         ; 4-byte Folded Spill
+; GFX11-NEXT  s_mov_b32 exec_lo, s4
+; GFX11-NEXT  s_add_i32 s32, s32, 16
+; GFX11-NEXT  s_getpc_b64 s[4:5]
+; GFX11-NEXT  s_add_u32 s4, s4, caller_void_func_i32_v2float_inreg@gotpcrel32@lo+4
+; GFX11-NEXT  s_addc_u32 s5, s5, caller_void_func_i32_v2float_inreg@gotpcrel32@hi+12
+; GFX11-NEXT  v_writelane_b32 v40, s3, 2
+; GFX11-NEXT  s_load_b64 s[4:5], s[4:5], 0x0
+; GFX11-NEXT  v_writelane_b32 v40, s30, 0
+; GFX11-NEXT  v_writelane_b32 v40, s31, 1
+; GFX11-NEXT  s_waitcnt lgkmcnt(0)
+; GFX11-NEXT  s_swappc_b64 s[30:31], s[4:5]
+; GFX11-NEXT  s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT  v_readlane_b32 s31, v40, 1
+; GFX11-NEXT  v_readlane_b32 s30, v40, 0
+; GFX11-NEXT  v_readlane_b32 s0, v40, 2
+; GFX11-NEXT  s_or_saveexec_b32 s1, -1
+; GFX11-NEXT  scratch_load_b32 v40, off, s33          ; 4-byte Folded Reload
+; GFX11-NEXT  s_mov_b32 exec_lo, s1
+; GFX11-NEXT  s_add_i32 s32, s32, -16
+; GFX11-NEXT  s_mov_b32 s33, s0
+; GFX11-NEXT  s_waitcnt vmcnt(0)
+; GFX11-NEXT  s_setpc_b64 s[30:31]
+  call void @caller_void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inreg %arg1)
+  ret void
+}
+
 attributes #0 = { nounwind }
 attributes #1 = { nounwind noinline }