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[AArch64][GlobalISel] Add legalizer & selector support for G_FREEZE.
These should legalize like undefs and select into copies. The ll test is copied from the x86 test, minus the half fp case because we don't currently support that.
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5 files changed

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lines changed

‎llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2596,6 +2596,8 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
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return true;
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}
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case TargetOpcode::G_FREEZE:
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return selectCopy(I, TII, MRI, TRI, RBI);
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case TargetOpcode::G_INTTOPTR:
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// The importer is currently unable to import pointer types since they

‎llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
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return;
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}
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61-
getActionDefinitionsBuilder(G_IMPLICIT_DEF)
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getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE})
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.legalFor({p0, s1, s8, s16, s32, s64, v2s32, v4s32, v2s64})
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.clampScalar(0, s1, s64)
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.widenScalarToNextPow2(0, 8)

‎llvm/test/CodeGen/AArch64/GlobalISel/freeze.ll

Lines changed: 149 additions & 0 deletions
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@@ -0,0 +1,149 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s --check-prefix=GISEL
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%struct.T = type { i32, i32 }
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define i32 @freeze_int() {
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; CHECK-LABEL: freeze_int:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mul w0, w8, w8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_int:
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; GISEL: // %bb.0:
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; GISEL-NEXT: mul w0, w8, w8
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; GISEL-NEXT: ret
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%y1 = freeze i32 undef
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%t1 = mul i32 %y1, %y1
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ret i32 %t1
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}
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define i5 @freeze_int2() {
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; CHECK-LABEL: freeze_int2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mul w0, w8, w8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_int2:
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; GISEL: // %bb.0:
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; GISEL-NEXT: mul w0, w8, w8
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; GISEL-NEXT: ret
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%y1 = freeze i5 undef
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%t1 = mul i5 %y1, %y1
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ret i5 %t1
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}
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define float @freeze_float() {
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; CHECK-LABEL: freeze_float:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd s0, s0, s0
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_float:
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; GISEL: // %bb.0:
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; GISEL-NEXT: fadd s0, s0, s0
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; GISEL-NEXT: ret
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%y1 = freeze float undef
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%t1 = fadd float %y1, %y1
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ret float %t1
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}
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define <2 x i32> @freeze_ivec() {
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; CHECK-LABEL: freeze_ivec:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add v0.2s, v0.2s, v0.2s
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_ivec:
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; GISEL: // %bb.0:
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; GISEL-NEXT: add v0.2s, v0.2s, v0.2s
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; GISEL-NEXT: ret
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%y1 = freeze <2 x i32> undef
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%t1 = add <2 x i32> %y1, %y1
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ret <2 x i32> %t1
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}
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define i8* @freeze_ptr() {
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; CHECK-LABEL: freeze_ptr:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x0, x8, #4 // =4
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_ptr:
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; GISEL: // %bb.0:
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; GISEL-NEXT: add x0, x8, #4 // =4
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; GISEL-NEXT: ret
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%y1 = freeze i8* undef
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%t1 = getelementptr i8, i8* %y1, i64 4
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ret i8* %t1
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}
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define i32 @freeze_struct() {
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; CHECK-LABEL: freeze_struct:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w0, w8, w8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_struct:
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; GISEL: // %bb.0:
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; GISEL-NEXT: add w0, w8, w8
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; GISEL-NEXT: ret
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%y1 = freeze %struct.T undef
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%v1 = extractvalue %struct.T %y1, 0
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%v2 = extractvalue %struct.T %y1, 1
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%t1 = add i32 %v1, %v2
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ret i32 %t1
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}
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define i32 @freeze_anonstruct() {
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; CHECK-LABEL: freeze_anonstruct:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w0, w8, w8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_anonstruct:
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; GISEL: // %bb.0:
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; GISEL-NEXT: add w0, w8, w8
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; GISEL-NEXT: ret
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%y1 = freeze {i32, i32} undef
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%v1 = extractvalue {i32, i32} %y1, 0
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%v2 = extractvalue {i32, i32} %y1, 1
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%t1 = add i32 %v1, %v2
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ret i32 %t1
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}
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define i32 @freeze_anonstruct2() {
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; CHECK-LABEL: freeze_anonstruct2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w0, w8, w8, uxth
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_anonstruct2:
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; GISEL: // %bb.0:
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; GISEL-NEXT: add w0, w8, w8, uxth
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; GISEL-NEXT: ret
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%y1 = freeze {i32, i16} undef
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%v1 = extractvalue {i32, i16} %y1, 0
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%v2 = extractvalue {i32, i16} %y1, 1
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%z2 = zext i16 %v2 to i32
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%t1 = add i32 %v1, %z2
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ret i32 %t1
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}
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define i64 @freeze_array() {
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; CHECK-LABEL: freeze_array:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x0, x8, x8
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; CHECK-NEXT: ret
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;
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; GISEL-LABEL: freeze_array:
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; GISEL: // %bb.0:
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; GISEL-NEXT: add x0, x8, x8
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; GISEL-NEXT: ret
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%y1 = freeze [2 x i64] undef
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%v1 = extractvalue [2 x i64] %y1, 0
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%v2 = extractvalue [2 x i64] %y1, 1
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%t1 = add i64 %v1, %v2
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ret i64 %t1
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}

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir

Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,70 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=aarch64 -run-pass=legalizer -O0 %s -o - | FileCheck %s
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---
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name: test_freeze_s64
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body: |
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bb.0.entry:
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liveins: $x0
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; CHECK-LABEL: name: test_freeze_s64
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; CHECK: %x0:_(s64) = COPY $x0
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; CHECK: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE %x0
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; CHECK: $x0 = COPY [[FREEZE]](s64)
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%x0:_(s64) = COPY $x0
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%1:_(s64) = G_FREEZE %x0
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$x0 = COPY %1(s64)
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...
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---
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name: test_freeze_v4s32
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body: |
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bb.0:
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liveins: $q0
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; CHECK-LABEL: name: test_freeze_v4s32
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; CHECK: %q0:_(<4 x s32>) = COPY $q0
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; CHECK: [[FREEZE:%[0-9]+]]:_(<4 x s32>) = G_FREEZE %q0
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; CHECK: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[FREEZE]](<4 x s32>)
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; CHECK: $x0 = COPY [[UV]](<2 x s32>)
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; CHECK: $x1 = COPY [[UV1]](<2 x s32>)
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%q0:_(<4 x s32>) = COPY $q0
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%0:_(<4 x s32>) = G_FREEZE %q0
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%1:_(<2 x s32> ), %2:_(<2 x s32>) = G_UNMERGE_VALUES %0
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$x0 = COPY %1
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$x1 = COPY %2
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...
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---
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name: test_freeze_v4s64
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body: |
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bb.0:
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; CHECK-LABEL: name: test_freeze_v4s64
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; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY [[DEF]](<2 x s64>)
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; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s64>) = G_FREEZE [[DEF]]
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; CHECK: [[FREEZE1:%[0-9]+]]:_(<2 x s64>) = G_FREEZE [[COPY]]
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; CHECK: $q0 = COPY [[FREEZE]](<2 x s64>)
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; CHECK: $q1 = COPY [[FREEZE1]](<2 x s64>)
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%undef:_(<4 x s64>) = G_IMPLICIT_DEF
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%0:_(<4 x s64>) = G_FREEZE %undef
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%1:_(<2 x s64> ), %2:_(<2 x s64>) = G_UNMERGE_VALUES %0
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$q0 = COPY %1
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$q1 = COPY %2
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...
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---
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name: test_freeze_v2s32
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_freeze_v2s32
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; CHECK: %d0:_(<2 x s32>) = COPY $d0
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; CHECK: [[FREEZE:%[0-9]+]]:_(<2 x s32>) = G_FREEZE %d0
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[FREEZE]](<2 x s32>)
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; CHECK: $w0 = COPY [[UV]](s32)
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; CHECK: $w1 = COPY [[UV1]](s32)
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%d0:_(<2 x s32>) = COPY $d0
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%0:_(<2 x s32>) = G_FREEZE %d0
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%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0
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$w0 = COPY %1
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$w1 = COPY %2
70+
...

‎llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -117,8 +117,9 @@
117117
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
118118
#
119119
# DEBUG-NEXT: G_FREEZE (opcode {{[0-9]+}}): 1 type index, 0 imm indices
120-
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
121-
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
120+
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
121+
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
122+
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
122123
#
123124
# DEBUG-NEXT: G_INTRINSIC_TRUNC (opcode {{[0-9]+}}): 1 type index, 0 imm indices
124125
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}

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