@@ -100,18 +100,16 @@ void arr_assign6() {
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}
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// CHECK-LABEL: define void {{.*}}arr_assign7
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- // CHECK: [[Arr3:%.*]] = alloca [2 x [2 x i32]], align 4
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- // CHECK-NEXT: [[Arr4:%.*]] = alloca [2 x [2 x i32]], align 4
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- // CHECK-NEXT: [[Tmp:%.*]] = alloca [2 x i32], align 4
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+ // CHECK: [[Arr:%.*]] = alloca [2 x [2 x i32]], align 4
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+ // CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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- // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 16, i1 false)
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- // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr4]], ptr align 4 {{@.*}}, i32 16, i1 false)
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- // CHECK-NEXT: store i32 6, ptr [[Tmp]], align 4
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- // CHECK-NEXT: [[AIE:%.*]] = getelementptr inbounds i32, ptr [[Tmp]], i32 1
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- // CHECK-NEXT: store i32 6, ptr [[AIE]], align 4
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- // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 [[Arr4]], i32 16, i1 false)
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- // CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[Arr3]], i32 0, i32 0
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- // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Idx]], ptr align 4 [[Tmp]], i32 8, i1 false)
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+ // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 16, i1 false)
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+ // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 {{@.*}}, i32 16, i1 false)
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+ // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 16, i1 false)
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+ // CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[Arr]], i32 0, i32 0
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+ // CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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+ // CHECK-NEXT: [[Idx2:%.*]] = getelementptr inbounds i32, ptr %arrayidx, i32 1
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+ // CHECK-NEXT: store i32 6, ptr [[Idx2]], align 4
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// CHECK-NEXT: ret void
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void arr_assign7 () {
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int Arr[2 ][2 ] = {{0 , 1 }, {2 , 3 }};
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