Skip to content

Commit 681192b

Browse files
Poseydon42Poseydon42
committed
Update tests
1 parent 40fe1c7 commit 681192b

File tree

10 files changed

+504
-620
lines changed

10 files changed

+504
-620
lines changed

‎llvm/test/CodeGen/ARM/scmp.ll

Lines changed: 60 additions & 82 deletions
Original file line numberDiff line numberDiff line change
@@ -4,18 +4,16 @@
44
define i8 @scmp_8_8(i8 %x, i8 %y) nounwind {
55
; CHECK-LABEL: scmp_8_8:
66
; CHECK: @ %bb.0:
7-
; CHECK-NEXT: sxtb r2, r0
8-
; CHECK-NEXT: movs r0, #0
7+
; CHECK-NEXT: sxtb r0, r0
98
; CHECK-NEXT: sxtb r1, r1
10-
; CHECK-NEXT: cmp r2, r1
11-
; CHECK-NEXT: it gt
12-
; CHECK-NEXT: movgt r0, #1
13-
; CHECK-NEXT: cmp r0, #0
14-
; CHECK-NEXT: it ne
15-
; CHECK-NEXT: movne r0, #1
16-
; CHECK-NEXT: cmp r2, r1
9+
; CHECK-NEXT: cmp r0, r1
10+
; CHECK-NEXT: mov.w r0, #0
11+
; CHECK-NEXT: mov.w r2, #0
1712
; CHECK-NEXT: it lt
18-
; CHECK-NEXT: movlt.w r0, #-1
13+
; CHECK-NEXT: movlt r0, #1
14+
; CHECK-NEXT: it gt
15+
; CHECK-NEXT: movgt r2, #1
16+
; CHECK-NEXT: subs r0, r2, r0
1917
; CHECK-NEXT: bx lr
2018
%1 = call i8 @llvm.scmp(i8 %x, i8 %y)
2119
ret i8 %1
@@ -24,18 +22,16 @@ define i8 @scmp_8_8(i8 %x, i8 %y) nounwind {
2422
define i8 @scmp_8_16(i16 %x, i16 %y) nounwind {
2523
; CHECK-LABEL: scmp_8_16:
2624
; CHECK: @ %bb.0:
27-
; CHECK-NEXT: sxth r2, r0
28-
; CHECK-NEXT: movs r0, #0
25+
; CHECK-NEXT: sxth r0, r0
2926
; CHECK-NEXT: sxth r1, r1
30-
; CHECK-NEXT: cmp r2, r1
31-
; CHECK-NEXT: it gt
32-
; CHECK-NEXT: movgt r0, #1
33-
; CHECK-NEXT: cmp r0, #0
34-
; CHECK-NEXT: it ne
35-
; CHECK-NEXT: movne r0, #1
36-
; CHECK-NEXT: cmp r2, r1
27+
; CHECK-NEXT: cmp r0, r1
28+
; CHECK-NEXT: mov.w r0, #0
29+
; CHECK-NEXT: mov.w r2, #0
3730
; CHECK-NEXT: it lt
38-
; CHECK-NEXT: movlt.w r0, #-1
31+
; CHECK-NEXT: movlt r0, #1
32+
; CHECK-NEXT: it gt
33+
; CHECK-NEXT: movgt r2, #1
34+
; CHECK-NEXT: subs r0, r2, r0
3935
; CHECK-NEXT: bx lr
4036
%1 = call i8 @llvm.scmp(i16 %x, i16 %y)
4137
ret i8 %1
@@ -44,17 +40,14 @@ define i8 @scmp_8_16(i16 %x, i16 %y) nounwind {
4440
define i8 @scmp_8_32(i32 %x, i32 %y) nounwind {
4541
; CHECK-LABEL: scmp_8_32:
4642
; CHECK: @ %bb.0:
47-
; CHECK-NEXT: movs r2, #0
4843
; CHECK-NEXT: cmp r0, r1
44+
; CHECK-NEXT: mov.w r0, #0
45+
; CHECK-NEXT: mov.w r2, #0
46+
; CHECK-NEXT: it lt
47+
; CHECK-NEXT: movlt r0, #1
4948
; CHECK-NEXT: it gt
5049
; CHECK-NEXT: movgt r2, #1
51-
; CHECK-NEXT: cmp r2, #0
52-
; CHECK-NEXT: it ne
53-
; CHECK-NEXT: movne r2, #1
54-
; CHECK-NEXT: cmp r0, r1
55-
; CHECK-NEXT: it lt
56-
; CHECK-NEXT: movlt.w r2, #-1
57-
; CHECK-NEXT: mov r0, r2
50+
; CHECK-NEXT: subs r0, r2, r0
5851
; CHECK-NEXT: bx lr
5952
%1 = call i8 @llvm.scmp(i32 %x, i32 %y)
6053
ret i8 %1
@@ -63,19 +56,17 @@ define i8 @scmp_8_32(i32 %x, i32 %y) nounwind {
6356
define i8 @scmp_8_64(i64 %x, i64 %y) nounwind {
6457
; CHECK-LABEL: scmp_8_64:
6558
; CHECK: @ %bb.0:
66-
; CHECK-NEXT: subs.w r12, r2, r0
59+
; CHECK-NEXT: subs.w r12, r0, r2
6760
; CHECK-NEXT: mov.w r9, #0
68-
; CHECK-NEXT: sbcs.w r12, r3, r1
61+
; CHECK-NEXT: sbcs.w r12, r1, r3
62+
; CHECK-NEXT: mov.w r12, #0
6963
; CHECK-NEXT: it lt
70-
; CHECK-NEXT: movlt.w r9, #1
71-
; CHECK-NEXT: cmp.w r9, #0
72-
; CHECK-NEXT: it ne
73-
; CHECK-NEXT: movne.w r9, #1
74-
; CHECK-NEXT: subs r0, r0, r2
75-
; CHECK-NEXT: sbcs.w r0, r1, r3
64+
; CHECK-NEXT: movlt.w r12, #1
65+
; CHECK-NEXT: subs r0, r2, r0
66+
; CHECK-NEXT: sbcs.w r0, r3, r1
7667
; CHECK-NEXT: it lt
77-
; CHECK-NEXT: movlt.w r9, #-1
78-
; CHECK-NEXT: mov r0, r9
68+
; CHECK-NEXT: movlt.w r9, #1
69+
; CHECK-NEXT: sub.w r0, r9, r12
7970
; CHECK-NEXT: bx lr
8071
%1 = call i8 @llvm.scmp(i64 %x, i64 %y)
8172
ret i8 %1
@@ -85,25 +76,24 @@ define i8 @scmp_8_128(i128 %x, i128 %y) nounwind {
8576
; CHECK-LABEL: scmp_8_128:
8677
; CHECK: @ %bb.0:
8778
; CHECK-NEXT: push {r4, r5, r6, lr}
88-
; CHECK-NEXT: ldrd r12, lr, [sp, #16]
89-
; CHECK-NEXT: mov.w r9, #0
90-
; CHECK-NEXT: ldrd r4, r5, [sp, #24]
91-
; CHECK-NEXT: subs.w r6, r12, r0
92-
; CHECK-NEXT: sbcs.w r6, lr, r1
93-
; CHECK-NEXT: sbcs.w r6, r4, r2
94-
; CHECK-NEXT: sbcs.w r6, r5, r3
79+
; CHECK-NEXT: add.w lr, sp, #16
80+
; CHECK-NEXT: ldr r4, [sp, #28]
81+
; CHECK-NEXT: movs r5, #0
82+
; CHECK-NEXT: ldm.w lr, {r9, r12, lr}
83+
; CHECK-NEXT: subs.w r6, r0, r9
84+
; CHECK-NEXT: sbcs.w r6, r1, r12
85+
; CHECK-NEXT: sbcs.w r6, r2, lr
86+
; CHECK-NEXT: sbcs.w r6, r3, r4
87+
; CHECK-NEXT: mov.w r6, #0
9588
; CHECK-NEXT: it lt
96-
; CHECK-NEXT: movlt.w r9, #1
97-
; CHECK-NEXT: cmp.w r9, #0
98-
; CHECK-NEXT: it ne
99-
; CHECK-NEXT: movne.w r9, #1
100-
; CHECK-NEXT: subs.w r0, r0, r12
101-
; CHECK-NEXT: sbcs.w r0, r1, lr
102-
; CHECK-NEXT: sbcs.w r0, r2, r4
103-
; CHECK-NEXT: sbcs.w r0, r3, r5
89+
; CHECK-NEXT: movlt r6, #1
90+
; CHECK-NEXT: subs.w r0, r9, r0
91+
; CHECK-NEXT: sbcs.w r0, r12, r1
92+
; CHECK-NEXT: sbcs.w r0, lr, r2
93+
; CHECK-NEXT: sbcs.w r0, r4, r3
10494
; CHECK-NEXT: it lt
105-
; CHECK-NEXT: movlt.w r9, #-1
106-
; CHECK-NEXT: mov r0, r9
95+
; CHECK-NEXT: movlt r5, #1
96+
; CHECK-NEXT: subs r0, r5, r6
10797
; CHECK-NEXT: pop {r4, r5, r6, pc}
10898
%1 = call i8 @llvm.scmp(i128 %x, i128 %y)
10999
ret i8 %1
@@ -112,17 +102,14 @@ define i8 @scmp_8_128(i128 %x, i128 %y) nounwind {
112102
define i32 @scmp_32_32(i32 %x, i32 %y) nounwind {
113103
; CHECK-LABEL: scmp_32_32:
114104
; CHECK: @ %bb.0:
115-
; CHECK-NEXT: movs r2, #0
116105
; CHECK-NEXT: cmp r0, r1
106+
; CHECK-NEXT: mov.w r0, #0
107+
; CHECK-NEXT: mov.w r2, #0
108+
; CHECK-NEXT: it lt
109+
; CHECK-NEXT: movlt r0, #1
117110
; CHECK-NEXT: it gt
118111
; CHECK-NEXT: movgt r2, #1
119-
; CHECK-NEXT: cmp r2, #0
120-
; CHECK-NEXT: it ne
121-
; CHECK-NEXT: movne r2, #1
122-
; CHECK-NEXT: cmp r0, r1
123-
; CHECK-NEXT: it lt
124-
; CHECK-NEXT: movlt.w r2, #-1
125-
; CHECK-NEXT: mov r0, r2
112+
; CHECK-NEXT: subs r0, r2, r0
126113
; CHECK-NEXT: bx lr
127114
%1 = call i32 @llvm.scmp(i32 %x, i32 %y)
128115
ret i32 %1
@@ -131,19 +118,17 @@ define i32 @scmp_32_32(i32 %x, i32 %y) nounwind {
131118
define i32 @scmp_32_64(i64 %x, i64 %y) nounwind {
132119
; CHECK-LABEL: scmp_32_64:
133120
; CHECK: @ %bb.0:
134-
; CHECK-NEXT: subs.w r12, r2, r0
121+
; CHECK-NEXT: subs.w r12, r0, r2
135122
; CHECK-NEXT: mov.w r9, #0
136-
; CHECK-NEXT: sbcs.w r12, r3, r1
123+
; CHECK-NEXT: sbcs.w r12, r1, r3
124+
; CHECK-NEXT: mov.w r12, #0
137125
; CHECK-NEXT: it lt
138-
; CHECK-NEXT: movlt.w r9, #1
139-
; CHECK-NEXT: cmp.w r9, #0
140-
; CHECK-NEXT: it ne
141-
; CHECK-NEXT: movne.w r9, #1
142-
; CHECK-NEXT: subs r0, r0, r2
143-
; CHECK-NEXT: sbcs.w r0, r1, r3
126+
; CHECK-NEXT: movlt.w r12, #1
127+
; CHECK-NEXT: subs r0, r2, r0
128+
; CHECK-NEXT: sbcs.w r0, r3, r1
144129
; CHECK-NEXT: it lt
145-
; CHECK-NEXT: movlt.w r9, #-1
146-
; CHECK-NEXT: mov r0, r9
130+
; CHECK-NEXT: movlt.w r9, #1
131+
; CHECK-NEXT: sub.w r0, r9, r12
147132
; CHECK-NEXT: bx lr
148133
%1 = call i32 @llvm.scmp(i64 %x, i64 %y)
149134
ret i32 %1
@@ -162,15 +147,8 @@ define i64 @scmp_64_64(i64 %x, i64 %y) nounwind {
162147
; CHECK-NEXT: sbcs.w r0, r3, r1
163148
; CHECK-NEXT: it lt
164149
; CHECK-NEXT: movlt.w r9, #1
165-
; CHECK-NEXT: cmp.w r9, #0
166-
; CHECK-NEXT: it ne
167-
; CHECK-NEXT: movne.w r9, #1
168-
; CHECK-NEXT: cmp.w r12, #0
169-
; CHECK-NEXT: itt ne
170-
; CHECK-NEXT: movne.w r9, #-1
171-
; CHECK-NEXT: movne.w r12, #-1
172-
; CHECK-NEXT: mov r0, r9
173-
; CHECK-NEXT: mov r1, r12
150+
; CHECK-NEXT: sub.w r0, r9, r12
151+
; CHECK-NEXT: asrs r1, r0, #31
174152
; CHECK-NEXT: bx lr
175153
%1 = call i64 @llvm.scmp(i64 %x, i64 %y)
176154
ret i64 %1

0 commit comments

Comments
 (0)