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4 | 4 | ; Make sure we always consider the default edge executable for a switch
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5 | 5 | ; with no cases.
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6 | 6 | declare void @foo()
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| 7 | +declare i32 @g(i32) |
| 8 | + |
7 | 9 | define void @test1() {
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8 | 10 | ; CHECK-LABEL: @test1(
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9 | 11 | ; CHECK-NEXT: switch i32 undef, label [[D:%.*]] [
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@@ -301,6 +303,73 @@ end.2:
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301 | 303 | ret i32 20
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302 | 304 | }
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303 | 305 |
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| 306 | +define i32 @test_default_unreachable_by_dom_cond(i32 %x) { |
| 307 | +; CHECK-LABEL: @test_default_unreachable_by_dom_cond( |
| 308 | +; CHECK-NEXT: entry: |
| 309 | +; CHECK-NEXT: [[OR_COND:%.*]] = icmp ult i32 [[X:%.*]], 4 |
| 310 | +; CHECK-NEXT: br i1 [[OR_COND]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] |
| 311 | +; CHECK: if.then: |
| 312 | +; CHECK-NEXT: switch i32 [[X]], label [[SW_EPILOG:%.*]] [ |
| 313 | +; CHECK-NEXT: i32 0, label [[SW_BB:%.*]] |
| 314 | +; CHECK-NEXT: i32 1, label [[SW_BB2:%.*]] |
| 315 | +; CHECK-NEXT: i32 2, label [[SW_BB4:%.*]] |
| 316 | +; CHECK-NEXT: i32 3, label [[SW_BB6:%.*]] |
| 317 | +; CHECK-NEXT: ] |
| 318 | +; CHECK: sw.bb: |
| 319 | +; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @g(i32 2) |
| 320 | +; CHECK-NEXT: br label [[RETURN]] |
| 321 | +; CHECK: sw.bb2: |
| 322 | +; CHECK-NEXT: [[CALL3:%.*]] = tail call i32 @g(i32 3) |
| 323 | +; CHECK-NEXT: br label [[RETURN]] |
| 324 | +; CHECK: sw.bb4: |
| 325 | +; CHECK-NEXT: [[CALL5:%.*]] = tail call i32 @g(i32 4) |
| 326 | +; CHECK-NEXT: br label [[RETURN]] |
| 327 | +; CHECK: sw.bb6: |
| 328 | +; CHECK-NEXT: [[CALL7:%.*]] = tail call i32 @g(i32 5) |
| 329 | +; CHECK-NEXT: br label [[RETURN]] |
| 330 | +; CHECK: sw.epilog: |
| 331 | +; CHECK-NEXT: call void @foo() |
| 332 | +; CHECK-NEXT: br label [[RETURN]] |
| 333 | +; CHECK: return: |
| 334 | +; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[CALL7]], [[SW_BB6]] ], [ [[CALL5]], [[SW_BB4]] ], [ [[CALL3]], [[SW_BB2]] ], [ [[CALL]], [[SW_BB]] ], [ -23, [[SW_EPILOG]] ], [ -23, [[ENTRY:%.*]] ] |
| 335 | +; CHECK-NEXT: ret i32 [[RETVAL_0]] |
| 336 | +; |
| 337 | +entry: |
| 338 | + %or.cond = icmp ult i32 %x, 4 |
| 339 | + br i1 %or.cond, label %if.then, label %return |
| 340 | + |
| 341 | +if.then: |
| 342 | + switch i32 %x, label %sw.epilog [ |
| 343 | + i32 0, label %sw.bb |
| 344 | + i32 1, label %sw.bb2 |
| 345 | + i32 2, label %sw.bb4 |
| 346 | + i32 3, label %sw.bb6 |
| 347 | + ] |
| 348 | + |
| 349 | +sw.bb: |
| 350 | + %call = tail call i32 @g(i32 2) |
| 351 | + br label %return |
| 352 | + |
| 353 | +sw.bb2: |
| 354 | + %call3 = tail call i32 @g(i32 3) |
| 355 | + br label %return |
| 356 | + |
| 357 | +sw.bb4: |
| 358 | + %call5 = tail call i32 @g(i32 4) |
| 359 | + br label %return |
| 360 | + |
| 361 | +sw.bb6: |
| 362 | + %call7 = tail call i32 @g(i32 5) |
| 363 | + br label %return |
| 364 | + |
| 365 | +sw.epilog: |
| 366 | + call void @foo() |
| 367 | + br label %return |
| 368 | + |
| 369 | +return: |
| 370 | + %retval.0 = phi i32 [ %call7, %sw.bb6 ], [ %call5, %sw.bb4 ], [ %call3, %sw.bb2 ], [ %call, %sw.bb ], [ -23, %sw.epilog ], [ -23, %entry ] |
| 371 | + ret i32 %retval.0 |
| 372 | +} |
304 | 373 |
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305 | 374 | declare void @llvm.assume(i1)
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306 | 375 |
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