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Update tests
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‎llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll

Lines changed: 65 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2-
; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefix=SDAG %s
3-
; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -global-isel=1 < %s | FileCheck -check-prefix=GISEL %s
2+
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=SDAG %s
3+
; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -global-isel=1 < %s | FileCheck -check-prefix=GISEL %s
44

55
; Note: if you're adding tests here, also add them to
66
; lower-buffer-fat-pointers-contents-legalization.ll to verify the IR produced by
@@ -4260,8 +4260,8 @@ define void @store_i256(i256 %data, ptr addrspace(8) inreg %buf) {
42604260

42614261
;;; Non-byte-sized scalars. Require zero-extension.
42624262

4263-
define i7 @load_i4(ptr addrspace(8) inreg %buf) {
4264-
; SDAG-LABEL: load_i4:
4263+
define i7 @load_i7(ptr addrspace(8) inreg %buf) {
4264+
; SDAG-LABEL: load_i7:
42654265
; SDAG: ; %bb.0:
42664266
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
42674267
; SDAG-NEXT: s_mov_b32 s11, s17
@@ -4272,7 +4272,7 @@ define i7 @load_i4(ptr addrspace(8) inreg %buf) {
42724272
; SDAG-NEXT: s_waitcnt vmcnt(0)
42734273
; SDAG-NEXT: s_setpc_b64 s[30:31]
42744274
;
4275-
; GISEL-LABEL: load_i4:
4275+
; GISEL-LABEL: load_i7:
42764276
; GISEL: ; %bb.0:
42774277
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
42784278
; GISEL-NEXT: s_mov_b32 s4, s6
@@ -4287,8 +4287,8 @@ define i7 @load_i4(ptr addrspace(8) inreg %buf) {
42874287
ret i7 %ret
42884288
}
42894289

4290-
define void @store_i4(i7 %data, ptr addrspace(8) inreg %buf) {
4291-
; SDAG-LABEL: store_i4:
4290+
define void @store_i7(i7 %data, ptr addrspace(8) inreg %buf) {
4291+
; SDAG-LABEL: store_i7:
42924292
; SDAG: ; %bb.0:
42934293
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
42944294
; SDAG-NEXT: s_mov_b32 s11, s17
@@ -4300,7 +4300,7 @@ define void @store_i4(i7 %data, ptr addrspace(8) inreg %buf) {
43004300
; SDAG-NEXT: s_waitcnt vmcnt(0)
43014301
; SDAG-NEXT: s_setpc_b64 s[30:31]
43024302
;
4303-
; GISEL-LABEL: store_i4:
4303+
; GISEL-LABEL: store_i7:
43044304
; GISEL: ; %bb.0:
43054305
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
43064306
; GISEL-NEXT: s_mov_b32 s4, s6
@@ -4316,6 +4316,63 @@ define void @store_i4(i7 %data, ptr addrspace(8) inreg %buf) {
43164316
ret void
43174317
}
43184318

4319+
define i4 @load_i4(ptr addrspace(8) inreg %buf) {
4320+
; SDAG-LABEL: load_i4:
4321+
; SDAG: ; %bb.0:
4322+
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4323+
; SDAG-NEXT: s_mov_b32 s11, s17
4324+
; SDAG-NEXT: s_mov_b32 s10, s16
4325+
; SDAG-NEXT: s_mov_b32 s9, s7
4326+
; SDAG-NEXT: s_mov_b32 s8, s6
4327+
; SDAG-NEXT: buffer_load_ubyte v0, off, s[8:11], 0
4328+
; SDAG-NEXT: s_waitcnt vmcnt(0)
4329+
; SDAG-NEXT: s_setpc_b64 s[30:31]
4330+
;
4331+
; GISEL-LABEL: load_i4:
4332+
; GISEL: ; %bb.0:
4333+
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4334+
; GISEL-NEXT: s_mov_b32 s4, s6
4335+
; GISEL-NEXT: s_mov_b32 s5, s7
4336+
; GISEL-NEXT: s_mov_b32 s6, s16
4337+
; GISEL-NEXT: s_mov_b32 s7, s17
4338+
; GISEL-NEXT: buffer_load_ubyte v0, off, s[4:7], 0
4339+
; GISEL-NEXT: s_waitcnt vmcnt(0)
4340+
; GISEL-NEXT: s_setpc_b64 s[30:31]
4341+
%p = addrspacecast ptr addrspace(8) %buf to ptr addrspace(7)
4342+
%ret = load i4, ptr addrspace(7) %p
4343+
ret i4 %ret
4344+
}
4345+
4346+
define void @store_i4(i4 %data, ptr addrspace(8) inreg %buf) {
4347+
; SDAG-LABEL: store_i4:
4348+
; SDAG: ; %bb.0:
4349+
; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4350+
; SDAG-NEXT: s_mov_b32 s11, s17
4351+
; SDAG-NEXT: s_mov_b32 s10, s16
4352+
; SDAG-NEXT: s_mov_b32 s9, s7
4353+
; SDAG-NEXT: s_mov_b32 s8, s6
4354+
; SDAG-NEXT: v_and_b32_e32 v0, 15, v0
4355+
; SDAG-NEXT: buffer_store_byte v0, off, s[8:11], 0
4356+
; SDAG-NEXT: s_waitcnt vmcnt(0)
4357+
; SDAG-NEXT: s_setpc_b64 s[30:31]
4358+
;
4359+
; GISEL-LABEL: store_i4:
4360+
; GISEL: ; %bb.0:
4361+
; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4362+
; GISEL-NEXT: s_mov_b32 s4, s6
4363+
; GISEL-NEXT: s_mov_b32 s5, s7
4364+
; GISEL-NEXT: s_mov_b32 s6, s16
4365+
; GISEL-NEXT: s_mov_b32 s7, s17
4366+
; GISEL-NEXT: v_and_b32_e32 v0, 15, v0
4367+
; GISEL-NEXT: buffer_store_byte v0, off, s[4:7], 0
4368+
; GISEL-NEXT: s_waitcnt vmcnt(0)
4369+
; GISEL-NEXT: s_setpc_b64 s[30:31]
4370+
%p = addrspacecast ptr addrspace(8) %buf to ptr addrspace(7)
4371+
store i4 %data, ptr addrspace(7) %p
4372+
ret void
4373+
}
4374+
4375+
43194376
;;; Byte-sized vectors of i4. Require casts.
43204377

43214378
define <2 x i4> @load_v2i4(ptr addrspace(8) inreg %buf) {

‎llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll

Lines changed: 28 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1724,8 +1724,8 @@ define void @store_i256(i256 %data, ptr addrspace(8) %buf) {
17241724

17251725
;;; Non-byte-sized scalars. Require zero-extension.
17261726

1727-
define i7 @load_i4(ptr addrspace(8) %buf) {
1728-
; CHECK-LABEL: define i7 @load_i4(
1727+
define i7 @load_i7(ptr addrspace(8) %buf) {
1728+
; CHECK-LABEL: define i7 @load_i7(
17291729
; CHECK-SAME: ptr addrspace(8) [[BUF:%.*]]) #[[ATTR0]] {
17301730
; CHECK-NEXT: [[RET_LOADABLE:%.*]] = call i8 @llvm.amdgcn.raw.ptr.buffer.load.i8(ptr addrspace(8) align 1 [[BUF]], i32 0, i32 0, i32 0)
17311731
; CHECK-NEXT: [[RET:%.*]] = trunc i8 [[RET_LOADABLE]] to i7
@@ -1736,8 +1736,8 @@ define i7 @load_i4(ptr addrspace(8) %buf) {
17361736
ret i7 %ret
17371737
}
17381738

1739-
define void @store_i4(i7 %data, ptr addrspace(8) %buf) {
1740-
; CHECK-LABEL: define void @store_i4(
1739+
define void @store_i7(i7 %data, ptr addrspace(8) %buf) {
1740+
; CHECK-LABEL: define void @store_i7(
17411741
; CHECK-SAME: i7 [[DATA:%.*]], ptr addrspace(8) [[BUF:%.*]]) #[[ATTR0]] {
17421742
; CHECK-NEXT: [[DATA_ZEXT:%.*]] = zext i7 [[DATA]] to i8
17431743
; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.i8(i8 [[DATA_ZEXT]], ptr addrspace(8) align 1 [[BUF]], i32 0, i32 0, i32 0)
@@ -1748,6 +1748,30 @@ define void @store_i4(i7 %data, ptr addrspace(8) %buf) {
17481748
ret void
17491749
}
17501750

1751+
define i4 @load_i4(ptr addrspace(8) %buf) {
1752+
; CHECK-LABEL: define i4 @load_i4(
1753+
; CHECK-SAME: ptr addrspace(8) [[BUF:%.*]]) #[[ATTR0]] {
1754+
; CHECK-NEXT: [[RET_LOADABLE:%.*]] = call i8 @llvm.amdgcn.raw.ptr.buffer.load.i8(ptr addrspace(8) align 1 [[BUF]], i32 0, i32 0, i32 0)
1755+
; CHECK-NEXT: [[RET:%.*]] = trunc i8 [[RET_LOADABLE]] to i4
1756+
; CHECK-NEXT: ret i4 [[RET]]
1757+
;
1758+
%p = addrspacecast ptr addrspace(8) %buf to ptr addrspace(7)
1759+
%ret = load i4, ptr addrspace(7) %p
1760+
ret i4 %ret
1761+
}
1762+
1763+
define void @store_i4(i4 %data, ptr addrspace(8) %buf) {
1764+
; CHECK-LABEL: define void @store_i4(
1765+
; CHECK-SAME: i4 [[DATA:%.*]], ptr addrspace(8) [[BUF:%.*]]) #[[ATTR0]] {
1766+
; CHECK-NEXT: [[DATA_ZEXT:%.*]] = zext i4 [[DATA]] to i8
1767+
; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.i8(i8 [[DATA_ZEXT]], ptr addrspace(8) align 1 [[BUF]], i32 0, i32 0, i32 0)
1768+
; CHECK-NEXT: ret void
1769+
;
1770+
%p = addrspacecast ptr addrspace(8) %buf to ptr addrspace(7)
1771+
store i4 %data, ptr addrspace(7) %p
1772+
ret void
1773+
}
1774+
17511775
;;; Byte-sized vectors of i4. Require casts.
17521776

17531777
define <2 x i4> @load_v2i4(ptr addrspace(8) %buf) {

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