Skip to content

Commit 68e21e1

Browse files
[AArch64] Add support for ACTLR_EL12 system register (#105497)
Documentation can be found here: https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/ACTLR-EL1--Auxiliary-Control-Register--EL1-
1 parent 3c8f139 commit 68e21e1

File tree

3 files changed

+9
-0
lines changed

3 files changed

+9
-0
lines changed

llvm/lib/Target/AArch64/AArch64SystemOperands.td

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -939,6 +939,7 @@ def : RWSysReg<"SCTLR_EL1", 0b11, 0b000, 0b0001, 0b0000, 0b000>;
939939
def : RWSysReg<"SCTLR_EL2", 0b11, 0b100, 0b0001, 0b0000, 0b000>;
940940
def : RWSysReg<"SCTLR_EL3", 0b11, 0b110, 0b0001, 0b0000, 0b000>;
941941
def : RWSysReg<"ACTLR_EL1", 0b11, 0b000, 0b0001, 0b0000, 0b001>;
942+
def : RWSysReg<"ACTLR_EL12", 0b11, 0b101, 0b0001, 0b0000, 0b001>;
942943
def : RWSysReg<"ACTLR_EL2", 0b11, 0b100, 0b0001, 0b0000, 0b001>;
943944
def : RWSysReg<"ACTLR_EL3", 0b11, 0b110, 0b0001, 0b0000, 0b001>;
944945
def : RWSysReg<"HCR_EL2", 0b11, 0b100, 0b0001, 0b0001, 0b000>;

llvm/test/MC/AArch64/arm64-system-encoding.s

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ foo:
5959
; MSR/MRS instructions
6060
;-----------------------------------------------------------------------------
6161
msr ACTLR_EL1, x3
62+
msr ACTLR_EL12, x3
6263
msr ACTLR_EL2, x3
6364
msr ACTLR_EL3, x3
6465
msr AFSR0_EL1, x3
@@ -167,6 +168,7 @@ foo:
167168
msr S0_0_C0_C0_0, x0
168169
msr S1_2_C3_C4_5, x2
169170
; CHECK: msr ACTLR_EL1, x3 ; encoding: [0x23,0x10,0x18,0xd5]
171+
; CHECK: msr ACTLR_EL12, x3 ; encoding: [0x23,0x10,0x1d,0xd5]
170172
; CHECK: msr ACTLR_EL2, x3 ; encoding: [0x23,0x10,0x1c,0xd5]
171173
; CHECK: msr ACTLR_EL3, x3 ; encoding: [0x23,0x10,0x1e,0xd5]
172174
; CHECK: msr AFSR0_EL1, x3 ; encoding: [0x03,0x51,0x18,0xd5]
@@ -280,6 +282,7 @@ foo:
280282
; CHECK-ERRORS: :[[@LINE-1]]:7: error: expected writable system register or pstate
281283

282284
mrs x3, ACTLR_EL1
285+
mrs x3, ACTLR_EL12
283286
mrs x3, ACTLR_EL2
284287
mrs x3, ACTLR_EL3
285288
mrs x3, AFSR0_EL1
@@ -501,6 +504,7 @@ foo:
501504
mrs x3, S3_3_c11_c1_4
502505

503506
; CHECK: mrs x3, ACTLR_EL1 ; encoding: [0x23,0x10,0x38,0xd5]
507+
; CHECK: mrs x3, ACTLR_EL12 ; encoding: [0x23,0x10,0x3d,0xd5]
504508
; CHECK: mrs x3, ACTLR_EL2 ; encoding: [0x23,0x10,0x3c,0xd5]
505509
; CHECK: mrs x3, ACTLR_EL3 ; encoding: [0x23,0x10,0x3e,0xd5]
506510
; CHECK: mrs x3, AFSR0_EL1 ; encoding: [0x03,0x51,0x38,0xd5]

llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3245,6 +3245,7 @@
32453245
# CHECK: msr {{sctlr_el2|SCTLR_EL2}}, x12
32463246
# CHECK: msr {{sctlr_el3|SCTLR_EL3}}, x12
32473247
# CHECK: msr {{actlr_el1|ACTLR_EL1}}, x12
3248+
# CHECK: msr {{actlr_el12|ACTLR_EL12}}, x12
32483249
# CHECK: msr {{actlr_el2|ACTLR_EL2}}, x12
32493250
# CHECK: msr {{actlr_el3|ACTLR_EL3}}, x12
32503251
# CHECK: msr {{cpacr_el1|CPACR_EL1}}, x12
@@ -3575,6 +3576,7 @@
35753576
# CHECK: mrs x9, {{sctlr_el2|SCTLR_EL2}}
35763577
# CHECK: mrs x9, {{sctlr_el3|SCTLR_EL3}}
35773578
# CHECK: mrs x9, {{actlr_el1|ACTLR_EL1}}
3579+
# CHECK: mrs x9, {{actlr_el12|ACTLR_EL12}}
35783580
# CHECK: mrs x9, {{actlr_el2|ACTLR_EL2}}
35793581
# CHECK: mrs x9, {{actlr_el3|ACTLR_EL3}}
35803582
# CHECK: mrs x9, {{cpacr_el1|CPACR_EL1}}
@@ -3867,6 +3869,7 @@
38673869
0xc 0x10 0x1c 0xd5
38683870
0xc 0x10 0x1e 0xd5
38693871
0x2c 0x10 0x18 0xd5
3872+
0x2c 0x10 0x1d 0xd5
38703873
0x2c 0x10 0x1c 0xd5
38713874
0x2c 0x10 0x1e 0xd5
38723875
0x4c 0x10 0x18 0xd5
@@ -4199,6 +4202,7 @@
41994202
0x9 0x10 0x3c 0xd5
42004203
0x9 0x10 0x3e 0xd5
42014204
0x29 0x10 0x38 0xd5
4205+
0x29 0x10 0x3d 0xd5
42024206
0x29 0x10 0x3c 0xd5
42034207
0x29 0x10 0x3e 0xd5
42044208
0x49 0x10 0x38 0xd5

0 commit comments

Comments
 (0)