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[X86] Add getGFNICtrlMask helper for the constant creation and bitcasting. NFC.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -29096,6 +29096,16 @@ uint64_t getGFNICtrlImm(unsigned Opcode, unsigned Amt = 0) {
2909629096
llvm_unreachable("Unsupported GFNI opcode");
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}
2909829098

29099+
// Generate a GFNI gf2p8affine bitmask for vXi8 bitreverse/shift/rotate.
29100+
SDValue getGFNICtrlMask(unsigned Opcode, SelectionDAG &DAG, const SDLoc &DL, MVT VT,
29101+
unsigned Amt = 0) {
29102+
assert(VT.getVectorElementType() == MVT::i8 &&
29103+
(VT.getSizeInBits() % 64) == 0 && "Illegal GFNI control type");
29104+
uint64_t Imm = getGFNICtrlImm(Opcode, Amt);
29105+
MVT MaskVT = MVT::getVectorVT(MVT::i64, VT.getSizeInBits() / 64);
29106+
return DAG.getBitcast(VT, DAG.getConstant(Imm, DL, MaskVT));
29107+
}
29108+
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// Return true if the required (according to Opcode) shift-imm form is natively
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// supported by the Subtarget
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static bool supportedVectorShiftWithImm(EVT VT, const X86Subtarget &Subtarget,
@@ -29284,9 +29294,7 @@ static SDValue LowerShiftByScalarImmediate(SDValue Op, SelectionDAG &DAG,
2928429294
return SDValue();
2928529295

2928629296
if (Subtarget.hasGFNI()) {
29287-
uint64_t ShiftMask = getGFNICtrlImm(Op.getOpcode(), ShiftAmt);
29288-
MVT MaskVT = MVT::getVectorVT(MVT::i64, NumElts / 8);
29289-
SDValue Mask = DAG.getBitcast(VT, DAG.getConstant(ShiftMask, dl, MaskVT));
29297+
SDValue Mask = getGFNICtrlMask(Op.getOpcode(), DAG, dl, VT, ShiftAmt);
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return DAG.getNode(X86ISD::GF2P8AFFINEQB, dl, VT, R, Mask,
2929129299
DAG.getTargetConstant(0, dl, MVT::i8));
2929229300
}
@@ -30191,9 +30199,7 @@ static SDValue LowerRotate(SDValue Op, const X86Subtarget &Subtarget,
3019130199
if (IsCstSplat && Subtarget.hasGFNI() && VT.getScalarType() == MVT::i8 &&
3019230200
DAG.getTargetLoweringInfo().isTypeLegal(VT)) {
3019330201
uint64_t RotAmt = CstSplatValue.urem(EltSizeInBits);
30194-
uint64_t RotMask = getGFNICtrlImm(Opcode, RotAmt);
30195-
MVT MaskVT = MVT::getVectorVT(MVT::i64, VT.getSizeInBits() / 64);
30196-
SDValue Mask = DAG.getBitcast(VT, DAG.getConstant(RotMask, DL, MaskVT));
30202+
SDValue Mask = getGFNICtrlMask(Opcode, DAG, DL, VT, RotAmt);
3019730203
return DAG.getNode(X86ISD::GF2P8AFFINEQB, DL, VT, R, Mask,
3019830204
DAG.getTargetConstant(0, DL, MVT::i8));
3019930205
}
@@ -31528,10 +31534,7 @@ static SDValue LowerBITREVERSE(SDValue Op, const X86Subtarget &Subtarget,
3152831534

3152931535
// If we have GFNI, we can use GF2P8AFFINEQB to reverse the bits.
3153031536
if (Subtarget.hasGFNI()) {
31531-
MVT MatrixVT = MVT::getVectorVT(MVT::i64, NumElts / 8);
31532-
SDValue Matrix =
31533-
DAG.getConstant(getGFNICtrlImm(ISD::BITREVERSE), DL, MatrixVT);
31534-
Matrix = DAG.getBitcast(VT, Matrix);
31537+
SDValue Matrix = getGFNICtrlMask(ISD::BITREVERSE, DAG, DL, VT);
3153531538
return DAG.getNode(X86ISD::GF2P8AFFINEQB, DL, VT, In, Matrix,
3153631539
DAG.getTargetConstant(0, DL, MVT::i8));
3153731540
}

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