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fixup! [SPIR-V] Add pre-headers to loops.
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2 files changed

+13
-8
lines changed

2 files changed

+13
-8
lines changed

llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,12 @@ void SPIRVPassConfig::addIRPasses() {
156156
// Once legalized, we need to structurize the CFG to follow the spec.
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// This is done through the following 8 steps.
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// TODO(#75801): add the remaining steps.
159+
160+
// 1. Simplify loop for subsequent transformations. After this steps, loops
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// have the following properties:
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// - loops have a single entry edge (pre-header to loop header).
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// - all loop exits are dominated by the loop pre-header.
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// - loops have a single back-edge.
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addPass(createLoopSimplifyPass());
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}
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llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4,12 +4,11 @@
44
; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#uint_0:]] = OpConstant %[[#uint]] 0
66

7-
define i32 @main(i32 noundef %0) #1 {
8-
%2 = icmp ne i32 %0, 0
9-
br i1 %2, label %l1, label %l2
7+
define void @main() #1 {
8+
%1 = icmp ne i32 0, 0
9+
br i1 %1, label %l1, label %l2
1010

11-
; CHECK: %[[#param_0:]] = OpFunctionParameter %[[#uint]]
12-
; CHECK: %[[#cond:]] = OpINotEqual %[[#bool]] %[[#param_0]] %[[#uint_0]]
11+
; CHECK: %[[#cond:]] = OpINotEqual %[[#bool]] %[[#uint_0]] %[[#uint_0]]
1312
; CHECK: OpBranchConditional %[[#cond]] %[[#l1_pre:]] %[[#l2_pre:]]
1413

1514
; CHECK-DAG: %[[#l2_pre]] = OpLabel
@@ -19,7 +18,7 @@ define i32 @main(i32 noundef %0) #1 {
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; CHECK-NEXT: OpBranch %[[#l1_header:]]
2019

2120
l1:
22-
br i1 %2, label %l1_body, label %l1_end
21+
br i1 %1, label %l1_body, label %l1_end
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; CHECK-DAG: %[[#l1_header]] = OpLabel
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; CHECK-NEXT: OpBranchConditional %[[#cond]] %[[#l1_body:]] %[[#l1_end:]]
2524

@@ -39,7 +38,7 @@ l1_end:
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; CHECK-NEXT: OpBranch %[[#end:]]
4039

4140
l2:
42-
br i1 %2, label %l2_body, label %l2_end
41+
br i1 %1, label %l2_body, label %l2_end
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; CHECK-DAG: %[[#l2_header]] = OpLabel
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; CHECK-NEXT: OpBranchConditional %[[#cond]] %[[#l2_body:]] %[[#l2_end:]]
4544

@@ -59,7 +58,7 @@ l2_end:
5958
; CHECK-NEXT: OpBranch %[[#end:]]
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end:
62-
ret i32 1
61+
ret void
6362
; CHECK-DAG: %[[#end]] = OpLabel
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; CHECK-NEXT: OpReturn
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}

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