@@ -241,17 +241,6 @@ class F3R_np<bits<5> opc, string OpcStr> :
241
241
!strconcat(OpcStr, " $dst, $b, $c"), []>;
242
242
// Three operand long
243
243
244
- /// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in one shot.
245
- multiclass FL3R_L2RUS<bits<9> opc1, bits<9> opc2, string OpcStr,
246
- SDNode OpNode> {
247
- def _l3r: _FL3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
248
- !strconcat(OpcStr, " $dst, $b, $c"),
249
- [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
250
- def _l2rus : _FL2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
251
- !strconcat(OpcStr, " $dst, $b, $c"),
252
- [(set GRRegs:$dst, (OpNode GRRegs:$b, immUs:$c))]>;
253
- }
254
-
255
244
/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in one shot.
256
245
multiclass FL3R_L2RBITP<bits<9> opc1, bits<9> opc2, string OpcStr,
257
246
SDNode OpNode> {
@@ -305,14 +294,6 @@ multiclass FU6_LU6_np<bits<10> opc, string OpcStr> {
305
294
def _lu6: _FLU6<opc, (outs), (ins i32imm:$a), !strconcat(OpcStr, " $a"), []>;
306
295
}
307
296
308
- // Two operand short
309
-
310
- class F2R_np<bits<6> opc, string OpcStr> :
311
- _F2R<opc, (outs GRRegs:$dst), (ins GRRegs:$b),
312
- !strconcat(OpcStr, " $dst, $b"), []>;
313
-
314
- // Two operand long
315
-
316
297
//===----------------------------------------------------------------------===//
317
298
// Pseudo Instructions
318
299
//===----------------------------------------------------------------------===//
0 commit comments