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[XCore] Remove unused TableGen classes and multiclasses
And warn on them from now on. Reviewed By: nigelp-xmos Differential Revision: https://reviews.llvm.org/D153533
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llvm/lib/Target/XCore/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ set(LLVM_TARGET_DEFINITIONS XCore.td)
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tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv)
7-
tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel)
7+
tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel -warn-on-unused-entities)
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tablegen(LLVM XCoreGenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM XCoreGenRegisterInfo.inc -gen-register-info)

llvm/lib/Target/XCore/XCoreInstrInfo.td

Lines changed: 0 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -241,17 +241,6 @@ class F3R_np<bits<5> opc, string OpcStr> :
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!strconcat(OpcStr, " $dst, $b, $c"), []>;
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// Three operand long
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/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in one shot.
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multiclass FL3R_L2RUS<bits<9> opc1, bits<9> opc2, string OpcStr,
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SDNode OpNode> {
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def _l3r: _FL3R<opc1, (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
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!strconcat(OpcStr, " $dst, $b, $c"),
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[(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
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def _l2rus : _FL2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
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!strconcat(OpcStr, " $dst, $b, $c"),
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[(set GRRegs:$dst, (OpNode GRRegs:$b, immUs:$c))]>;
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}
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/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in one shot.
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multiclass FL3R_L2RBITP<bits<9> opc1, bits<9> opc2, string OpcStr,
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SDNode OpNode> {
@@ -305,14 +294,6 @@ multiclass FU6_LU6_np<bits<10> opc, string OpcStr> {
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def _lu6: _FLU6<opc, (outs), (ins i32imm:$a), !strconcat(OpcStr, " $a"), []>;
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}
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// Two operand short
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class F2R_np<bits<6> opc, string OpcStr> :
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_F2R<opc, (outs GRRegs:$dst), (ins GRRegs:$b),
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!strconcat(OpcStr, " $dst, $b"), []>;
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// Two operand long
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//===----------------------------------------------------------------------===//
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// Pseudo Instructions
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//===----------------------------------------------------------------------===//

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