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[SPIR-V] Add partial order tests, assert reducible
Add testing for the visitor and added a note explaining irreducible CFG are not supported. Related to #116692 Signed-off-by: Nathan Gauër <[email protected]>
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6 files changed

+384
-31
lines changed

6 files changed

+384
-31
lines changed

llvm/lib/Target/SPIRV/SPIRVUtils.cpp

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -519,8 +519,11 @@ bool PartialOrderingVisitor::CanBeVisited(BasicBlock *BB) const {
519519
}
520520

521521
size_t PartialOrderingVisitor::GetNodeRank(BasicBlock *BB) const {
522-
size_t result = 0;
522+
auto It = BlockToOrder.find(BB);
523+
if (It != BlockToOrder.end())
524+
return It->second.Rank;
523525

526+
size_t result = 0;
524527
for (BasicBlock *P : predecessors(BB)) {
525528
// Ignore back-edges.
526529
if (DT.dominates(BB, P))
@@ -552,15 +555,20 @@ size_t PartialOrderingVisitor::visit(BasicBlock *BB, size_t Unused) {
552555
ToVisit.push(BB);
553556
Queued.insert(BB);
554557

558+
size_t QueueIndex = 0;
555559
while (ToVisit.size() != 0) {
556560
BasicBlock *BB = ToVisit.front();
557561
ToVisit.pop();
558562

559563
if (!CanBeVisited(BB)) {
560564
ToVisit.push(BB);
565+
assert(QueueIndex < ToVisit.size() &&
566+
"No valid candidate in the queue. Is the graph reducible?");
567+
QueueIndex++;
561568
continue;
562569
}
563570

571+
QueueIndex = 0;
564572
size_t Rank = GetNodeRank(BB);
565573
OrderInfo Info = {Rank, BlockToOrder.size()};
566574
BlockToOrder.emplace(BB, Info);

llvm/lib/Target/SPIRV/SPIRVUtils.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@ class SPIRVSubtarget;
4141
// ignores back-edges. The cycle is visited from the entry in the same
4242
// topological-like ordering.
4343
//
44+
// Note: this visitor REQUIRES a reducible graph.
45+
//
4446
// This means once we visit a node, we know all the possible ancestors have been
4547
// visited.
4648
//
@@ -84,10 +86,11 @@ class PartialOrderingVisitor {
8486
// Visits |BB| with the current rank being |Rank|.
8587
size_t visit(BasicBlock *BB, size_t Rank);
8688

87-
size_t GetNodeRank(BasicBlock *BB) const;
8889
bool CanBeVisited(BasicBlock *BB) const;
8990

9091
public:
92+
size_t GetNodeRank(BasicBlock *BB) const;
93+
9194
// Build the visitor to operate on the function F.
9295
PartialOrderingVisitor(Function &F);
9396

llvm/test/CodeGen/SPIRV/structurizer/cf.if.nested.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -34,26 +34,26 @@
3434
; CHECK: %[[#bb30:]] = OpLabel
3535
; CHECK: OpSelectionMerge %[[#bb31:]] None
3636
; CHECK: OpBranchConditional %[[#]] %[[#bb32:]] %[[#bb33:]]
37-
; CHECK: %[[#bb33]] = OpLabel
37+
; CHECK: %[[#bb32]] = OpLabel
3838
; CHECK: OpSelectionMerge %[[#bb34:]] None
39-
; CHECK: OpBranchConditional %[[#]] %[[#bb35:]] %[[#bb36:]]
40-
; CHECK: %[[#bb36]] = OpLabel
41-
; CHECK: OpSelectionMerge %[[#bb37:]] None
42-
; CHECK: OpBranchConditional %[[#]] %[[#bb38:]] %[[#bb37]]
43-
; CHECK: %[[#bb38]] = OpLabel
44-
; CHECK: OpBranch %[[#bb37]]
45-
; CHECK: %[[#bb37]] = OpLabel
46-
; CHECK: OpBranch %[[#bb34]]
39+
; CHECK: OpBranchConditional %[[#]] %[[#bb35:]] %[[#bb34]]
40+
; CHECK: %[[#bb33]] = OpLabel
41+
; CHECK: OpSelectionMerge %[[#bb36:]] None
42+
; CHECK: OpBranchConditional %[[#]] %[[#bb37:]] %[[#bb38:]]
4743
; CHECK: %[[#bb35]] = OpLabel
4844
; CHECK: OpBranch %[[#bb34]]
49-
; CHECK: %[[#bb34]] = OpLabel
50-
; CHECK: OpBranch %[[#bb31]]
51-
; CHECK: %[[#bb32]] = OpLabel
45+
; CHECK: %[[#bb37]] = OpLabel
46+
; CHECK: OpBranch %[[#bb36]]
47+
; CHECK: %[[#bb38]] = OpLabel
5248
; CHECK: OpSelectionMerge %[[#bb39:]] None
5349
; CHECK: OpBranchConditional %[[#]] %[[#bb40:]] %[[#bb39]]
50+
; CHECK: %[[#bb34]] = OpLabel
51+
; CHECK: OpBranch %[[#bb31]]
5452
; CHECK: %[[#bb40]] = OpLabel
5553
; CHECK: OpBranch %[[#bb39]]
5654
; CHECK: %[[#bb39]] = OpLabel
55+
; CHECK: OpBranch %[[#bb36]]
56+
; CHECK: %[[#bb36]] = OpLabel
5757
; CHECK: OpBranch %[[#bb31]]
5858
; CHECK: %[[#bb31]] = OpLabel
5959
; CHECK: OpReturnValue %[[#]]

llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple2.ll

Lines changed: 16 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -49,65 +49,64 @@
4949
; CHECK: OpSelectionMerge %[[#bb31:]] None
5050
; CHECK: OpBranchConditional %[[#]] %[[#bb32:]] %[[#bb33:]]
5151

52-
; CHECK: %[[#bb33]] = OpLabel
53-
; CHECK: OpUnreachable
54-
5552
; CHECK: %[[#bb32]] = OpLabel
5653
; CHECK: OpSelectionMerge %[[#bb34:]] None
5754
; CHECK: OpBranchConditional %[[#]] %[[#bb35:]] %[[#bb36:]]
5855

59-
; CHECK: %[[#bb36]] = OpLabel
56+
; CHECK: %[[#bb33]] = OpLabel
6057
; CHECK: OpUnreachable
6158

6259
; CHECK: %[[#bb35]] = OpLabel
6360
; CHECK: OpSelectionMerge %[[#bb37:]] None
6461
; CHECK: OpBranchConditional %[[#]] %[[#bb38:]] %[[#bb39:]]
6562

66-
; CHECK: %[[#bb39]] = OpLabel
63+
; CHECK: %[[#bb36]] = OpLabel
6764
; CHECK: OpUnreachable
6865

6966
; CHECK: %[[#bb38]] = OpLabel
7067
; CHECK: OpSelectionMerge %[[#bb40:]] None
7168
; CHECK: OpSwitch %[[#]] %[[#bb41:]] 1 %[[#bb42:]] 2 %[[#bb43:]] 3 %[[#bb44:]] 140 %[[#bb45:]] 4 %[[#bb46:]] 5 %[[#bb47:]] 6 %[[#bb48:]] 7 %[[#bb49:]]
69+
; CHECK: %[[#bb39]] = OpLabel
70+
; CHECK: OpUnreachable
7271

73-
; CHECK: %[[#bb49]] = OpLabel
72+
; CHECK: %[[#bb41]] = OpLabel
7473
; CHECK: OpBranch %[[#bb40]]
75-
; CHECK: %[[#bb48]] = OpLabel
74+
; CHECK: %[[#bb42]] = OpLabel
7675
; CHECK: OpBranch %[[#bb40]]
77-
; CHECK: %[[#bb47]] = OpLabel
76+
; CHECK: %[[#bb43]] = OpLabel
7877
; CHECK: OpBranch %[[#bb40]]
79-
; CHECK: %[[#bb46]] = OpLabel
78+
; CHECK: %[[#bb44]] = OpLabel
8079
; CHECK: OpBranch %[[#bb40]]
8180
; CHECK: %[[#bb45]] = OpLabel
8281
; CHECK: OpBranch %[[#bb40]]
83-
; CHECK: %[[#bb44]] = OpLabel
82+
; CHECK: %[[#bb46]] = OpLabel
8483
; CHECK: OpBranch %[[#bb40]]
85-
; CHECK: %[[#bb43]] = OpLabel
84+
; CHECK: %[[#bb47]] = OpLabel
8685
; CHECK: OpBranch %[[#bb40]]
87-
; CHECK: %[[#bb42]] = OpLabel
86+
; CHECK: %[[#bb48]] = OpLabel
8887
; CHECK: OpBranch %[[#bb40]]
89-
; CHECK: %[[#bb41]] = OpLabel
88+
; CHECK: %[[#bb49]] = OpLabel
9089
; CHECK: OpBranch %[[#bb40]]
9190

9291
; CHECK: %[[#bb40]] = OpLabel
9392
; CHECK: OpSelectionMerge %[[#bb50:]] None
9493
; CHECK: OpSwitch %[[#]] %[[#bb50]] 1 %[[#bb51:]] 2 %[[#bb52:]] 3 %[[#bb53:]]
95-
; CHECK: %[[#bb53]] = OpLabel
94+
; CHECK: %[[#bb51]] = OpLabel
9695
; CHECK: OpBranch %[[#bb50]]
9796
; CHECK: %[[#bb52]] = OpLabel
9897
; CHECK: OpBranch %[[#bb50]]
99-
; CHECK: %[[#bb51]] = OpLabel
98+
; CHECK: %[[#bb53]] = OpLabel
10099
; CHECK: OpBranch %[[#bb50]]
101100
; CHECK: %[[#bb50]] = OpLabel
102101
; CHECK: OpBranch %[[#bb37]]
103102

104103
; CHECK: %[[#bb37]] = OpLabel
105104
; CHECK: OpSelectionMerge %[[#bb54:]] None
106105
; CHECK: OpSwitch %[[#]] %[[#bb54]] 1 %[[#bb55:]] 2 %[[#bb56:]]
107-
; CHECK: %[[#bb56]] = OpLabel
108-
; CHECK: OpBranch %[[#bb54]]
109106
; CHECK: %[[#bb55]] = OpLabel
110107
; CHECK: OpBranch %[[#bb54]]
108+
; CHECK: %[[#bb56]] = OpLabel
109+
; CHECK: OpBranch %[[#bb54]]
111110
; CHECK: %[[#bb54]] = OpLabel
112111
; CHECK: OpBranch %[[#bb34]]
113112

llvm/unittests/Target/SPIRV/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,5 +16,6 @@ set(LLVM_LINK_COMPONENTS
1616
add_llvm_target_unittest(SPIRVTests
1717
SPIRVConvergenceRegionAnalysisTests.cpp
1818
SPIRVSortBlocksTests.cpp
19+
SPIRVPartialOrderingVisitorTests.cpp
1920
SPIRVAPITest.cpp
2021
)

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