Skip to content

Commit 6bca19c

Browse files
nikicnikic
committed
[InstCombine] Use InstSimplify in FoldOpIntoSelect
Instead of only trying to constant fold the select arms, try to simplify them.
1 parent 9c928d0 commit 6bca19c

File tree

6 files changed

+35
-48
lines changed

6 files changed

+35
-48
lines changed

‎llvm/lib/Transforms/InstCombine/InstructionCombining.cpp

Lines changed: 15 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1649,39 +1649,34 @@ Instruction *InstCombinerImpl::foldBinopOfSextBoolToSelect(BinaryOperator &BO) {
16491649
return SelectInst::Create(X, TVal, FVal);
16501650
}
16511651

1652-
static Constant *constantFoldOperationIntoSelectOperand(Instruction &I,
1653-
SelectInst *SI,
1654-
bool IsTrueArm) {
1655-
SmallVector<Constant *> ConstOps;
1652+
static Value *simplifyOperationIntoSelectOperand(Instruction &I, SelectInst *SI,
1653+
bool IsTrueArm) {
1654+
SmallVector<Value *> Ops;
16561655
for (Value *Op : I.operands()) {
1657-
Constant *C = nullptr;
1656+
Value *V = nullptr;
16581657
if (Op == SI) {
1659-
C = dyn_cast<Constant>(IsTrueArm ? SI->getTrueValue()
1660-
: SI->getFalseValue());
1658+
V = IsTrueArm ? SI->getTrueValue() : SI->getFalseValue();
16611659
} else if (match(SI->getCondition(),
16621660
m_SpecificICmp(IsTrueArm ? ICmpInst::ICMP_EQ
16631661
: ICmpInst::ICMP_NE,
1664-
m_Specific(Op), m_Constant(C))) &&
1665-
isGuaranteedNotToBeUndefOrPoison(C)) {
1662+
m_Specific(Op), m_Value(V))) &&
1663+
isGuaranteedNotToBeUndefOrPoison(V)) {
16661664
// Pass
16671665
} else {
1668-
C = dyn_cast<Constant>(Op);
1666+
V = Op;
16691667
}
1670-
if (C == nullptr)
1671-
return nullptr;
1672-
1673-
ConstOps.push_back(C);
1668+
Ops.push_back(V);
16741669
}
16751670

1676-
return ConstantFoldInstOperands(&I, ConstOps, I.getDataLayout());
1671+
return simplifyInstructionWithOperands(&I, Ops, I.getDataLayout());
16771672
}
16781673

16791674
static Value *foldOperationIntoSelectOperand(Instruction &I, SelectInst *SI,
16801675
Value *NewOp, InstCombiner &IC) {
16811676
Instruction *Clone = I.clone();
16821677
Clone->replaceUsesOfWith(SI, NewOp);
16831678
Clone->dropUBImplyingAttrsAndMetadata();
1684-
IC.InsertNewInstBefore(Clone, SI->getIterator());
1679+
IC.InsertNewInstBefore(Clone, I.getIterator());
16851680
return Clone;
16861681
}
16871682

@@ -1693,8 +1688,6 @@ Instruction *InstCombinerImpl::FoldOpIntoSelect(Instruction &Op, SelectInst *SI,
16931688

16941689
Value *TV = SI->getTrueValue();
16951690
Value *FV = SI->getFalseValue();
1696-
if (!(isa<Constant>(TV) || isa<Constant>(FV)))
1697-
return nullptr;
16981691

16991692
// Bool selects with constant operands can be folded to logical ops.
17001693
if (SI->getType()->isIntOrIntVectorTy(1))
@@ -1715,9 +1708,10 @@ Instruction *InstCombinerImpl::FoldOpIntoSelect(Instruction &Op, SelectInst *SI,
17151708
}
17161709
}
17171710

1718-
// Make sure that one of the select arms constant folds successfully.
1719-
Value *NewTV = constantFoldOperationIntoSelectOperand(Op, SI, /*IsTrueArm*/ true);
1720-
Value *NewFV = constantFoldOperationIntoSelectOperand(Op, SI, /*IsTrueArm*/ false);
1711+
// Make sure that one of the select arms folds successfully.
1712+
Value *NewTV = simplifyOperationIntoSelectOperand(Op, SI, /*IsTrueArm*/ true);
1713+
Value *NewFV =
1714+
simplifyOperationIntoSelectOperand(Op, SI, /*IsTrueArm*/ false);
17211715
if (!NewTV && !NewFV)
17221716
return nullptr;
17231717

‎llvm/test/Transforms/InstCombine/cast-mul-select.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -73,10 +73,10 @@ define i8 @select2(i1 %cond, i8 %x, i8 %y, i8 %z) {
7373
; DBGINFO-NEXT: #dbg_value(i8 [[Z:%.*]], [[META39:![0-9]+]], !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), [[META45:![0-9]+]])
7474
; DBGINFO-NEXT: [[D:%.*]] = add i8 [[X]], [[Y]], !dbg [[DBG46:![0-9]+]]
7575
; DBGINFO-NEXT: #dbg_value(!DIArgList(i8 [[X]], i8 [[Y]]), [[META40:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_arg, 1, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_plus, DW_OP_stack_value), [[DBG46]])
76-
; DBGINFO-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i8 [[Z]], i8 [[D]], !dbg [[DBG47:![0-9]+]]
77-
; DBGINFO-NEXT: #dbg_value(i32 poison, [[META41:![0-9]+]], !DIExpression(), [[DBG47]])
78-
; DBGINFO-NEXT: #dbg_value(i8 [[E]], [[META42:![0-9]+]], !DIExpression(), [[META48:![0-9]+]])
79-
; DBGINFO-NEXT: ret i8 [[E]], !dbg [[DBG49:![0-9]+]]
76+
; DBGINFO-NEXT: #dbg_value(i32 poison, [[META41:![0-9]+]], !DIExpression(), [[META47:![0-9]+]])
77+
; DBGINFO-NEXT: [[F:%.*]] = select i1 [[COND:%.*]], i8 [[Z]], i8 [[D]], !dbg [[META47]]
78+
; DBGINFO-NEXT: #dbg_value(i8 [[F]], [[META42:![0-9]+]], !DIExpression(), [[META48:![0-9]+]])
79+
; DBGINFO-NEXT: ret i8 [[F]], !dbg [[DBG49:![0-9]+]]
8080
;
8181
%A = zext i8 %x to i32
8282
%B = zext i8 %y to i32

‎llvm/test/Transforms/InstCombine/extract-select-agg.ll

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -56,14 +56,9 @@ define void @test_select_agg_multiuse(i1 %cond, i64 %v1, i64 %v2, i64 %v3, i64 %
5656
; CHECK-LABEL: define void @test_select_agg_multiuse(
5757
; CHECK-SAME: i1 [[COND:%.*]], i64 [[V1:%.*]], i64 [[V2:%.*]], i64 [[V3:%.*]], i64 [[V4:%.*]]) {
5858
; CHECK-NEXT: entry:
59-
; CHECK-NEXT: [[A0:%.*]] = insertvalue { i64, i64 } poison, i64 [[V1]], 0
60-
; CHECK-NEXT: [[A1:%.*]] = insertvalue { i64, i64 } [[A0]], i64 [[V2]], 1
61-
; CHECK-NEXT: [[B0:%.*]] = insertvalue { i64, i64 } poison, i64 [[V3]], 0
62-
; CHECK-NEXT: [[B1:%.*]] = insertvalue { i64, i64 } [[B0]], i64 [[V4]], 1
63-
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], { i64, i64 } [[A1]], { i64, i64 } [[B1]]
64-
; CHECK-NEXT: [[X:%.*]] = extractvalue { i64, i64 } [[SEL]], 0
59+
; CHECK-NEXT: [[X:%.*]] = select i1 [[COND]], i64 [[V1]], i64 [[V3]]
6560
; CHECK-NEXT: call void @use(i64 [[X]])
66-
; CHECK-NEXT: [[Y:%.*]] = extractvalue { i64, i64 } [[SEL]], 1
61+
; CHECK-NEXT: [[Y:%.*]] = select i1 [[COND]], i64 [[V2]], i64 [[V4]]
6762
; CHECK-NEXT: call void @use(i64 [[Y]])
6863
; CHECK-NEXT: ret void
6964
;

‎llvm/test/Transforms/InstCombine/fptrunc.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ define <2 x half> @fmul_constant_op1(<2 x float> %x) {
5252
define float @fptrunc_select_true_val(float %x, double %y, i1 %cond) {
5353
; CHECK-LABEL: @fptrunc_select_true_val(
5454
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc double [[Y:%.*]] to float
55-
; CHECK-NEXT: [[NARROW_SEL:%.*]] = select fast i1 [[COND:%.*]], float [[TMP1]], float [[X:%.*]]
55+
; CHECK-NEXT: [[NARROW_SEL:%.*]] = select i1 [[COND:%.*]], float [[TMP1]], float [[X:%.*]]
5656
; CHECK-NEXT: ret float [[NARROW_SEL]]
5757
;
5858
%e = fpext float %x to double
@@ -64,7 +64,7 @@ define float @fptrunc_select_true_val(float %x, double %y, i1 %cond) {
6464
define <2 x float> @fptrunc_select_false_val(<2 x float> %x, <2 x double> %y, <2 x i1> %cond) {
6565
; CHECK-LABEL: @fptrunc_select_false_val(
6666
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc <2 x double> [[Y:%.*]] to <2 x float>
67-
; CHECK-NEXT: [[NARROW_SEL:%.*]] = select nnan <2 x i1> [[COND:%.*]], <2 x float> [[X:%.*]], <2 x float> [[TMP1]]
67+
; CHECK-NEXT: [[NARROW_SEL:%.*]] = select <2 x i1> [[COND:%.*]], <2 x float> [[X:%.*]], <2 x float> [[TMP1]]
6868
; CHECK-NEXT: ret <2 x float> [[NARROW_SEL]]
6969
;
7070
%e = fpext <2 x float> %x to <2 x double>
@@ -80,7 +80,7 @@ define half @fptrunc_select_true_val_extra_use(half %x, float %y, i1 %cond) {
8080
; CHECK-NEXT: [[E:%.*]] = fpext half [[X:%.*]] to float
8181
; CHECK-NEXT: call void @use(float [[E]])
8282
; CHECK-NEXT: [[TMP1:%.*]] = fptrunc float [[Y:%.*]] to half
83-
; CHECK-NEXT: [[NARROW_SEL:%.*]] = select ninf i1 [[COND:%.*]], half [[TMP1]], half [[X]]
83+
; CHECK-NEXT: [[NARROW_SEL:%.*]] = select i1 [[COND:%.*]], half [[TMP1]], half [[X]]
8484
; CHECK-NEXT: ret half [[NARROW_SEL]]
8585
;
8686
%e = fpext half %x to float

‎llvm/test/Transforms/InstCombine/known-never-nan.ll

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -20,10 +20,10 @@ define i1 @fabs_sqrt_src_maybe_nan(double %arg0, double %arg1) {
2020

2121
define i1 @select_maybe_nan_lhs(i1 %cond, double %lhs, double %arg1) {
2222
; CHECK-LABEL: @select_maybe_nan_lhs(
23-
; CHECK-NEXT: [[RHS:%.*]] = fadd nnan double [[ARG1:%.*]], 1.000000e+00
24-
; CHECK-NEXT: [[OP:%.*]] = select i1 [[COND:%.*]], double [[LHS:%.*]], double [[RHS]]
25-
; CHECK-NEXT: [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
26-
; CHECK-NEXT: ret i1 [[TMP]]
23+
; CHECK-NEXT: [[TMP:%.*]] = fcmp ord double [[OP:%.*]], 0.000000e+00
24+
; CHECK-NEXT: [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
25+
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[NOT_COND]], i1 true, i1 [[TMP]]
26+
; CHECK-NEXT: ret i1 [[TMP1]]
2727
;
2828
%rhs = fadd nnan double %arg1, 1.0
2929
%op = select i1 %cond, double %lhs, double %rhs
@@ -33,10 +33,9 @@ define i1 @select_maybe_nan_lhs(i1 %cond, double %lhs, double %arg1) {
3333

3434
define i1 @select_maybe_nan_rhs(i1 %cond, double %arg0, double %rhs) {
3535
; CHECK-LABEL: @select_maybe_nan_rhs(
36-
; CHECK-NEXT: [[LHS:%.*]] = fadd nnan double [[ARG0:%.*]], 1.000000e+00
37-
; CHECK-NEXT: [[OP:%.*]] = select i1 [[COND:%.*]], double [[LHS]], double [[RHS:%.*]]
38-
; CHECK-NEXT: [[TMP:%.*]] = fcmp ord double [[OP]], 0.000000e+00
39-
; CHECK-NEXT: ret i1 [[TMP]]
36+
; CHECK-NEXT: [[TMP:%.*]] = fcmp ord double [[OP:%.*]], 0.000000e+00
37+
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[COND:%.*]], i1 true, i1 [[TMP]]
38+
; CHECK-NEXT: ret i1 [[TMP1]]
4039
;
4140
%lhs = fadd nnan double %arg0, 1.0
4241
%op = select i1 %cond, double %lhs, double %rhs

‎llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -393,7 +393,6 @@ define void @replicate_operands_in_with_operands_in_minbws(ptr %dst, ptr noalias
393393
; CHECK-LABEL: define void @replicate_operands_in_with_operands_in_minbws
394394
; CHECK-SAME: (ptr [[DST:%.*]], ptr noalias [[SRC_1:%.*]], ptr noalias [[SRC_2:%.*]], i32 [[X:%.*]]) {
395395
; CHECK-NEXT: entry:
396-
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X]], 65526
397396
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
398397
; CHECK: loop.header:
399398
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
@@ -405,10 +404,10 @@ define void @replicate_operands_in_with_operands_in_minbws(ptr %dst, ptr noalias
405404
; CHECK-NEXT: [[GEP_SRC_2:%.*]] = getelementptr inbounds i16, ptr [[SRC_2]], i64 [[IV]]
406405
; CHECK-NEXT: [[L_2:%.*]] = load i16, ptr [[GEP_SRC_2]], align 2
407406
; CHECK-NEXT: [[C_2:%.*]] = icmp ult i16 [[L_2]], 100
408-
; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[L_2]] to i32
409-
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C_2]], i32 [[SUB]], i32 [[CONV]]
410-
; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[SEL]] to i16
411-
; CHECK-NEXT: [[TRUNC:%.*]] = add i16 [[L_2]], [[TMP0]]
407+
; CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[X]] to i16
408+
; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -10
409+
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[C_2]], i16 [[TMP1]], i16 [[L_2]]
410+
; CHECK-NEXT: [[TRUNC:%.*]] = add i16 [[TMP2]], [[L_2]]
412411
; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[IV]]
413412
; CHECK-NEXT: store i16 [[TRUNC]], ptr [[GEP_DST]], align 2
414413
; CHECK-NEXT: br label [[LOOP_LATCH]]

0 commit comments

Comments
 (0)