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[InstCombine] Check for poison instead of undef in shuffle combine
Otherwise we may replace undef with poison. Note that a lot of tests regressing here already have variants that use poison instead of undef (often in a separate inseltpoison file), which is why I'm not adjusting them to the new pattern.
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7 files changed

+22
-13
lines changed

7 files changed

+22
-13
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3013,10 +3013,11 @@ Instruction *InstCombinerImpl::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
30133013
ShuffleVectorInst* LHSShuffle = dyn_cast<ShuffleVectorInst>(LHS);
30143014
ShuffleVectorInst* RHSShuffle = dyn_cast<ShuffleVectorInst>(RHS);
30153015
if (LHSShuffle)
3016-
if (!match(LHSShuffle->getOperand(1), m_Undef()) && !match(RHS, m_Undef()))
3016+
if (!match(LHSShuffle->getOperand(1), m_Poison()) &&
3017+
!match(RHS, m_Poison()))
30173018
LHSShuffle = nullptr;
30183019
if (RHSShuffle)
3019-
if (!match(RHSShuffle->getOperand(1), m_Undef()))
3020+
if (!match(RHSShuffle->getOperand(1), m_Poison()))
30203021
RHSShuffle = nullptr;
30213022
if (!LHSShuffle && !RHSShuffle)
30223023
return MadeChange ? &SVI : nullptr;
@@ -3039,7 +3040,7 @@ Instruction *InstCombinerImpl::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
30393040
Value* newRHS = RHS;
30403041
if (LHSShuffle) {
30413042
// case 1
3042-
if (match(RHS, m_Undef())) {
3043+
if (match(RHS, m_Poison())) {
30433044
newLHS = LHSOp0;
30443045
newRHS = LHSOp1;
30453046
}

‎llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -238,7 +238,7 @@ define amdgpu_ps <2 x float> @extract_elt0_elt1_elt2_buffer_load_v4f32_4(<4 x i3
238238
%elt2 = extractelement <4 x float> %data, i32 2
239239
%ins0 = insertelement <2 x float> poison, float %elt0, i32 0
240240
%ins1 = insertelement <2 x float> %ins0, float %elt2, i32 1
241-
%shuf = shufflevector <4 x float> undef, <4 x float> %data, <2 x i32> <i32 5, i32 1>
241+
%shuf = shufflevector <4 x float> poison, <4 x float> %data, <2 x i32> <i32 5, i32 1>
242242
%ret = fadd <2 x float> %ins1, %shuf
243243
ret <2 x float> %ret
244244
}

‎llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -238,7 +238,7 @@ define amdgpu_ps <2 x float> @extract_elt0_elt1_elt2_buffer_load_v4f32_4(<4 x i3
238238
%elt2 = extractelement <4 x float> %data, i32 2
239239
%ins0 = insertelement <2 x float> undef, float %elt0, i32 0
240240
%ins1 = insertelement <2 x float> %ins0, float %elt2, i32 1
241-
%shuf = shufflevector <4 x float> undef, <4 x float> %data, <2 x i32> <i32 5, i32 1>
241+
%shuf = shufflevector <4 x float> poison, <4 x float> %data, <2 x i32> <i32 5, i32 1>
242242
%ret = fadd <2 x float> %ins1, %shuf
243243
ret <2 x float> %ret
244244
}

‎llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -236,7 +236,7 @@ define <4 x float> @elts_test_vpermilvar_ps(<4 x float> %a0, i32 %a1) {
236236

237237
define <8 x float> @elts_test_vpermilvar_ps_256(<8 x float> %a0, <8 x i32> %a1) {
238238
; CHECK-LABEL: @elts_test_vpermilvar_ps_256(
239-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 poison, i32 0, i32 poison, i32 1, i32 poison, i32 6, i32 poison, i32 7>
239+
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> undef, <8 x i32> <i32 poison, i32 0, i32 poison, i32 1, i32 poison, i32 6, i32 poison, i32 7>
240240
; CHECK-NEXT: ret <8 x float> [[TMP1]]
241241
;
242242
%1 = shufflevector <8 x i32> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 3, i32 2, i32 1, i32 0>, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
@@ -270,7 +270,7 @@ define <2 x double> @elts_test_vpermilvar_pd(<2 x double> %a0, i64 %a1) {
270270

271271
define <4 x double> @elts_test_vpermilvar_pd_256(<4 x double> %a0, <4 x i64> %a1) {
272272
; CHECK-LABEL: @elts_test_vpermilvar_pd_256(
273-
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 poison>
273+
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 poison>
274274
; CHECK-NEXT: ret <4 x double> [[TMP1]]
275275
;
276276
%1 = shufflevector <4 x i64> <i64 0, i64 2, i64 0, i64 2>, <4 x i64> %a1, <4 x i32> <i32 1, i32 2, i32 3, i32 4>

‎llvm/test/Transforms/InstCombine/obfuscated_splat.ll

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,9 @@ define void @test_undef(ptr %in_ptr, ptr %out_ptr) {
55
; CHECK-LABEL: define void @test_undef(
66
; CHECK-SAME: ptr [[IN_PTR:%.*]], ptr [[OUT_PTR:%.*]]) {
77
; CHECK-NEXT: [[A:%.*]] = load <4 x float>, ptr [[IN_PTR]], align 16
8-
; CHECK-NEXT: [[D:%.*]] = shufflevector <4 x float> [[A]], <4 x float> poison, <4 x i32> zeroinitializer
8+
; CHECK-NEXT: [[B:%.*]] = shufflevector <4 x float> [[A]], <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 poison, i32 poison>
9+
; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x float> [[B]], <4 x float> [[A]], <4 x i32> <i32 0, i32 1, i32 4, i32 poison>
10+
; CHECK-NEXT: [[D:%.*]] = shufflevector <4 x float> [[C]], <4 x float> [[A]], <4 x i32> <i32 0, i32 1, i32 2, i32 4>
911
; CHECK-NEXT: store <4 x float> [[D]], ptr [[OUT_PTR]], align 16
1012
; CHECK-NEXT: ret void
1113
;

‎llvm/test/Transforms/InstCombine/trunc-extractelement.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,8 @@ define <4 x i64> @PR45314(<4 x i64> %x) {
182182
;
183183
; BE-LABEL: @PR45314(
184184
; BE-NEXT: [[TMP1:%.*]] = bitcast <4 x i64> [[X:%.*]] to <8 x i32>
185-
; BE-NEXT: [[S:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
185+
; BE-NEXT: [[I:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
186+
; BE-NEXT: [[S:%.*]] = shufflevector <8 x i32> [[I]], <8 x i32> undef, <8 x i32> zeroinitializer
186187
; BE-NEXT: [[B:%.*]] = bitcast <8 x i32> [[S]] to <4 x i64>
187188
; BE-NEXT: ret <4 x i64> [[B]]
188189
;

‎llvm/test/Transforms/InstCombine/vec_shuffle.ll

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -108,7 +108,8 @@ define <4 x float> @test8(<4 x float> %x, <4 x float> %y) {
108108
; different length then the second.
109109
define <4 x i8> @test9(<16 x i8> %t6) {
110110
; CHECK-LABEL: @test9(
111-
; CHECK-NEXT: [[T9:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> undef, <4 x i32> <i32 13, i32 9, i32 4, i32 13>
111+
; CHECK-NEXT: [[T7:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> undef, <4 x i32> <i32 13, i32 9, i32 4, i32 13>
112+
; CHECK-NEXT: [[T9:%.*]] = shufflevector <4 x i8> [[T7]], <4 x i8> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0>
112113
; CHECK-NEXT: ret <4 x i8> [[T9]]
113114
;
114115
%t7 = shufflevector <16 x i8> %t6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 >
@@ -135,7 +136,8 @@ define <4 x i8> @test9a(<16 x i8> %t6) {
135136
; different length then the second.
136137
define <4 x i8> @test9b(<4 x i8> %t6, <4 x i8> %t7) {
137138
; CHECK-LABEL: @test9b(
138-
; CHECK-NEXT: [[T9:%.*]] = shufflevector <4 x i8> [[T6:%.*]], <4 x i8> [[T7:%.*]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
139+
; CHECK-NEXT: [[T1:%.*]] = shufflevector <4 x i8> [[T6:%.*]], <4 x i8> [[T7:%.*]], <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 4, i32 5, i32 poison, i32 poison>
140+
; CHECK-NEXT: [[T9:%.*]] = shufflevector <8 x i8> [[T1]], <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
139141
; CHECK-NEXT: ret <4 x i8> [[T9]]
140142
;
141143
%t1 = shufflevector <4 x i8> %t6, <4 x i8> %t7, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 2, i32 3>
@@ -146,7 +148,8 @@ define <4 x i8> @test9b(<4 x i8> %t6, <4 x i8> %t7) {
146148
; Redundant vector splats should be removed. Radar 8597790.
147149
define <4 x i32> @test10(<4 x i32> %t5) {
148150
; CHECK-LABEL: @test10(
149-
; CHECK-NEXT: [[T7:%.*]] = shufflevector <4 x i32> [[T5:%.*]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
151+
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x i32> [[T5:%.*]], <4 x i32> undef, <4 x i32> <i32 1, i32 poison, i32 poison, i32 poison>
152+
; CHECK-NEXT: [[T7:%.*]] = shufflevector <4 x i32> [[T6]], <4 x i32> undef, <4 x i32> zeroinitializer
150153
; CHECK-NEXT: ret <4 x i32> [[T7]]
151154
;
152155
%t6 = shufflevector <4 x i32> %t5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
@@ -158,7 +161,9 @@ define <4 x i32> @test10(<4 x i32> %t5) {
158161

159162
define <8 x i8> @test11(<16 x i8> %t6) {
160163
; CHECK-LABEL: @test11(
161-
; CHECK-NEXT: [[T3:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
164+
; CHECK-NEXT: [[T1:%.*]] = shufflevector <16 x i8> [[T6:%.*]], <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
165+
; CHECK-NEXT: [[T2:%.*]] = shufflevector <16 x i8> [[T6]], <16 x i8> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
166+
; CHECK-NEXT: [[T3:%.*]] = shufflevector <4 x i8> [[T1]], <4 x i8> [[T2]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
162167
; CHECK-NEXT: ret <8 x i8> [[T3]]
163168
;
164169
%t1 = shufflevector <16 x i8> %t6, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>

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