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goldsteinngoldsteinn
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[X86] Add tests for folding (icmp ult (add x,-C),2) -> (or (icmp eq X,C), (icmp eq X,C+1)); NFC
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‎llvm/test/CodeGen/X86/eq-or-eq-range-of-2.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
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declare void @use.v4.i32(<4 x i32>)
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define <4 x i32> @eq_or_eq_ult_2(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_ult_2:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
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; AVX512-NEXT: vpcmpltud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_ult_2:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967291,4294967291,4294967291,4294967291]
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; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
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; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_ult_2:
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; SSE41: # %bb.0:
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; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [1,1,1,1]
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; SSE41-NEXT: pminud %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE2-LABEL: eq_or_eq_ult_2:
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; SSE2: # %bb.0:
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; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483650,2147483650,2147483650,2147483650]
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; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm0
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; SSE2-NEXT: retq
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%x_adj = add <4 x i32> %x, <i32 -5, i32 -5, i32 -5, i32 -5>
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%cmp = icmp ult <4 x i32> %x_adj, <i32 2, i32 2, i32 2, i32 2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @eq_or_eq_ult_2_only_transform_sse2(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_ult_2_only_transform_sse2:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX512-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vpcmpltud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vmovdqa32 %xmm1, %xmm0 {%k1} {z}
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_ult_2_only_transform_sse2:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
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; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_ult_2_only_transform_sse2:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE41-NEXT: paddd %xmm1, %xmm0
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [1,1,1,1]
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; SSE41-NEXT: pminud %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE2-LABEL: eq_or_eq_ult_2_only_transform_sse2:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE2-NEXT: paddd %xmm0, %xmm1
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; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483650,2147483650,2147483650,2147483650]
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; SSE2-NEXT: pcmpgtd %xmm1, %xmm0
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; SSE2-NEXT: retq
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%x_adj = add <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%cmp = icmp ult <4 x i32> %x_adj, <i32 2, i32 2, i32 2, i32 2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @eq_or_eq_ult_2_fail_multiuse(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_ult_2_fail_multiuse:
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; AVX512: # %bb.0:
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; AVX512-NEXT: subq $24, %rsp
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; AVX512-NEXT: .cfi_def_cfa_offset 32
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; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX512-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
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; AVX512-NEXT: callq use.v4.i32@PLT
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; AVX512-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
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; AVX512-NEXT: vpcmpltud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vmovdqa32 {{.*#+}} xmm0 {%k1} {z} = [4294967295,4294967295,4294967295,4294967295]
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; AVX512-NEXT: addq $24, %rsp
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; AVX512-NEXT: .cfi_def_cfa_offset 8
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_ult_2_fail_multiuse:
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; AVX2: # %bb.0:
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; AVX2-NEXT: subq $24, %rsp
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; AVX2-NEXT: .cfi_def_cfa_offset 32
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
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; AVX2-NEXT: callq use.v4.i32@PLT
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm0 = [1,1,1,1]
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; AVX2-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
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; AVX2-NEXT: vpminud %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: vpcmpeqd %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: addq $24, %rsp
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; AVX2-NEXT: .cfi_def_cfa_offset 8
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; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_ult_2_fail_multiuse:
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; SSE41: # %bb.0:
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; SSE41-NEXT: subq $24, %rsp
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; SSE41-NEXT: .cfi_def_cfa_offset 32
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE41-NEXT: paddd %xmm1, %xmm0
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; SSE41-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
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; SSE41-NEXT: callq use.v4.i32@PLT
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm0 = [1,1,1,1]
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; SSE41-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
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; SSE41-NEXT: pminud %xmm1, %xmm0
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: addq $24, %rsp
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; SSE41-NEXT: .cfi_def_cfa_offset 8
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; SSE41-NEXT: retq
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;
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; SSE2-LABEL: eq_or_eq_ult_2_fail_multiuse:
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; SSE2: # %bb.0:
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; SSE2-NEXT: subq $24, %rsp
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; SSE2-NEXT: .cfi_def_cfa_offset 32
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; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE2-NEXT: paddd %xmm0, %xmm1
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; SSE2-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
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; SSE2-NEXT: movdqa %xmm1, %xmm0
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; SSE2-NEXT: callq use.v4.i32@PLT
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; SSE2-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
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; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483650,2147483650,2147483650,2147483650]
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; SSE2-NEXT: pcmpgtd %xmm1, %xmm0
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; SSE2-NEXT: addq $24, %rsp
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; SSE2-NEXT: .cfi_def_cfa_offset 8
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; SSE2-NEXT: retq
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%x_adj = add <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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call void @use.v4.i32(<4 x i32> %x_adj)
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%cmp = icmp ult <4 x i32> %x_adj, <i32 2, i32 2, i32 2, i32 2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @eq_or_eq_ult_3_fail(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_ult_3_fail:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX512-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vpcmpltud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vmovdqa32 %xmm1, %xmm0 {%k1} {z}
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_ult_3_fail:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2,2,2,2]
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; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_ult_3_fail:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE41-NEXT: paddd %xmm1, %xmm0
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [2,2,2,2]
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; SSE41-NEXT: pminud %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE2-LABEL: eq_or_eq_ult_3_fail:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE2-NEXT: paddd %xmm0, %xmm1
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; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483651,2147483651,2147483651,2147483651]
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; SSE2-NEXT: pcmpgtd %xmm1, %xmm0
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; SSE2-NEXT: retq
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%x_adj = add <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%cmp = icmp ult <4 x i32> %x_adj, <i32 3, i32 3, i32 3, i32 3>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @eq_or_eq_ugt_m3(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_ugt_m3:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpcmpnleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_ugt_m3:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
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; AVX2-NEXT: vpmaxud %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_ugt_m3:
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; SSE41: # %bb.0:
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; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
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; SSE41-NEXT: pmaxud %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE2-LABEL: eq_or_eq_ugt_m3:
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; SSE2: # %bb.0:
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; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: retq
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%x_adj = add <4 x i32> %x, <i32 -11, i32 -14, i32 -11, i32 -11>
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%cmp = icmp ugt <4 x i32> %x_adj, <i32 -3, i32 -3, i32 -3, i32 -3>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @eq_or_eq_ule_1(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_ule_1:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpcmpleud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_ule_1:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
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; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
254+
; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_ule_1:
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; SSE41: # %bb.0:
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; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [1,1,1,1]
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; SSE41-NEXT: pminud %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: retq
263+
;
264+
; SSE2-LABEL: eq_or_eq_ule_1:
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; SSE2: # %bb.0:
266+
; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
267+
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
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; SSE2-NEXT: pxor %xmm1, %xmm0
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; SSE2-NEXT: retq
272+
%x_adj = add <4 x i32> %x, <i32 1, i32 2, i32 3, i32 4>
273+
%cmp = icmp ule <4 x i32> %x_adj, <i32 1, i32 1, i32 1, i32 1>
274+
%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
276+
}
277+
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define <4 x i32> @eq_or_eq_uge_m2(<4 x i32> %x) {
279+
; AVX512-LABEL: eq_or_eq_uge_m2:
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; AVX512: # %bb.0:
281+
; AVX512-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpcmpnltud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
283+
; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
284+
; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
285+
; AVX512-NEXT: retq
286+
;
287+
; AVX2-LABEL: eq_or_eq_uge_m2:
288+
; AVX2: # %bb.0:
289+
; AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
290+
; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
291+
; AVX2-NEXT: vpmaxud %xmm1, %xmm0, %xmm1
292+
; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
293+
; AVX2-NEXT: retq
294+
;
295+
; SSE41-LABEL: eq_or_eq_uge_m2:
296+
; SSE41: # %bb.0:
297+
; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
298+
; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [4294967294,4294967294,4294967294,4294967294]
299+
; SSE41-NEXT: pmaxud %xmm0, %xmm1
300+
; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
301+
; SSE41-NEXT: retq
302+
;
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; SSE2-LABEL: eq_or_eq_uge_m2:
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; SSE2: # %bb.0:
305+
; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
306+
; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
307+
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483646,2147483646,2147483646,2147483646]
308+
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
309+
; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
310+
; SSE2-NEXT: pxor %xmm1, %xmm0
311+
; SSE2-NEXT: retq
312+
%x_adj = add <4 x i32> %x, <i32 1, i32 2, i32 3, i32 4>
313+
%cmp = icmp uge <4 x i32> %x_adj, <i32 -2, i32 -2, i32 -2, i32 -2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}
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define <4 x i32> @eq_or_eq_uge_2_fail_(<4 x i32> %x) {
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; AVX512-LABEL: eq_or_eq_uge_2_fail_:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpcmpnltud {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %k1
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; AVX512-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; AVX512-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
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; AVX512-NEXT: retq
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;
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; AVX2-LABEL: eq_or_eq_uge_2_fail_:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2,2,2,2]
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; AVX2-NEXT: vpmaxud %xmm1, %xmm0, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; SSE41-LABEL: eq_or_eq_uge_2_fail_:
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; SSE41: # %bb.0:
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; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE41-NEXT: pmovsxbd {{.*#+}} xmm1 = [2,2,2,2]
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; SSE41-NEXT: pmaxud %xmm0, %xmm1
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; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE2-LABEL: eq_or_eq_uge_2_fail_:
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; SSE2: # %bb.0:
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; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483650,2147483650,2147483650,2147483650]
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; SSE2-NEXT: pcmpgtd %xmm0, %xmm1
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; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm0
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; SSE2-NEXT: retq
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%x_adj = add <4 x i32> %x, <i32 1, i32 2, i32 3, i32 4>
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%cmp = icmp uge <4 x i32> %x_adj, <i32 2, i32 2, i32 2, i32 2>
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%r = sext <4 x i1> %cmp to <4 x i32>
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ret <4 x i32> %r
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}

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