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[X86][SSE] Improve legal SHUFP and PSHUFD shuffle matching
Updated X86TargetLowering::isShuffleMaskLegal to match SHUFP masks with commuted inputs and PSHUFD masks that reference the second input. As part of this I've refactored isPSHUFDMask to work in a more general manner and allow it to match against either the first or second input vector. Differential Revision: http://reviews.llvm.org/D6287 llvm-svn: 222087
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‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 19 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3859,14 +3859,23 @@ static bool isSequentialOrUndefInRange(ArrayRef<int> Mask,
38593859
}
38603860

38613861
/// isPSHUFDMask - Return true if the node specifies a shuffle of elements that
3862-
/// is suitable for input to PSHUFD or PSHUFW. That is, it doesn't reference
3863-
/// the second operand.
3864-
static bool isPSHUFDMask(ArrayRef<int> Mask, MVT VT) {
3865-
if (VT == MVT::v4f32 || VT == MVT::v4i32 )
3866-
return (Mask[0] < 4 && Mask[1] < 4 && Mask[2] < 4 && Mask[3] < 4);
3867-
if (VT == MVT::v2f64 || VT == MVT::v2i64)
3868-
return (Mask[0] < 2 && Mask[1] < 2);
3869-
return false;
3862+
/// is suitable for input to PSHUFD. That is, it doesn't reference the other
3863+
/// operand - by default will match for first operand.
3864+
static bool isPSHUFDMask(ArrayRef<int> Mask, MVT VT,
3865+
bool TestSecondOperand = false) {
3866+
if (VT != MVT::v4f32 && VT != MVT::v4i32 &&
3867+
VT != MVT::v2f64 && VT != MVT::v2i64)
3868+
return false;
3869+
3870+
unsigned NumElems = VT.getVectorNumElements();
3871+
unsigned Lo = TestSecondOperand ? NumElems : 0;
3872+
unsigned Hi = Lo + NumElems;
3873+
3874+
for (unsigned i = 0; i < NumElems; ++i)
3875+
if (!isUndefOrInRange(Mask[i], (int)Lo, (int)Hi))
3876+
return false;
3877+
3878+
return true;
38703879
}
38713880

38723881
/// isPSHUFHWMask - Return true if the node specifies a shuffle of elements that
@@ -19638,7 +19647,9 @@ X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M,
1963819647
isMOVLMask(M, SVT) ||
1963919648
isMOVHLPSMask(M, SVT) ||
1964019649
isSHUFPMask(M, SVT) ||
19650+
isSHUFPMask(M, SVT, /* Commuted */ true) ||
1964119651
isPSHUFDMask(M, SVT) ||
19652+
isPSHUFDMask(M, SVT, /* SecondOperand */ true) ||
1964219653
isPSHUFHWMask(M, SVT, Subtarget->hasInt256()) ||
1964319654
isPSHUFLWMask(M, SVT, Subtarget->hasInt256()) ||
1964419655
isPALIGNRMask(M, SVT, Subtarget) ||

‎llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -614,22 +614,15 @@ define <4 x i64> @stress_test1(<4 x i64> %a, <4 x i64> %b) {
614614
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3,0,1]
615615
; AVX1-NEXT: vpermilpd {{.*#+}} ymm2 = ymm0[1,0,3,2]
616616
; AVX1-NEXT: vblendpd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3]
617-
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
618-
; AVX1-NEXT: vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
619617
; AVX1-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,3,2]
620-
; AVX1-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
621-
; AVX1-NEXT: vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
622-
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
618+
; AVX1-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
623619
; AVX1-NEXT: retq
624620
;
625621
; AVX2-LABEL: stress_test1:
626622
; AVX2: # BB#0:
627623
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm1[3,1,1,0]
628-
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,1,2,3]
629624
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[3,3,1,3]
630-
; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[2,3,2,3,6,7,6,7]
631-
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,0]
632-
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3,4,5,6,7]
625+
; AVX2-NEXT: vpunpckhqdq {{.*#+}} ymm0 = ymm1[1],ymm0[1],ymm1[3],ymm0[3]
633626
; AVX2-NEXT: retq
634627
%c = shufflevector <4 x i64> %b, <4 x i64> undef, <4 x i32> <i32 3, i32 1, i32 1, i32 0>
635628
%d = shufflevector <4 x i64> %c, <4 x i64> undef, <4 x i32> <i32 3, i32 undef, i32 2, i32 undef>

‎llvm/test/CodeGen/X86/vector-shuffle-combining.ll

Lines changed: 17 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -1121,12 +1121,7 @@ define <4 x i32> @combine_nested_undef_test28(<4 x i32> %A, <4 x i32> %B) {
11211121
define <4 x float> @combine_test1(<4 x float> %a, <4 x float> %b) {
11221122
; SSE2-LABEL: combine_test1:
11231123
; SSE2: # BB#0:
1124-
; SSE2-NEXT: movaps %xmm1, %xmm2
1125-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1126-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1127-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm1[1,3]
1128-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1129-
; SSE2-NEXT: movaps %xmm2, %xmm0
1124+
; SSE2-NEXT: movaps %xmm1, %xmm0
11301125
; SSE2-NEXT: retq
11311126
;
11321127
; SSSE3-LABEL: combine_test1:
@@ -1248,12 +1243,7 @@ define <4 x float> @combine_test5(<4 x float> %a, <4 x float> %b) {
12481243
define <4 x i32> @combine_test6(<4 x i32> %a, <4 x i32> %b) {
12491244
; SSE2-LABEL: combine_test6:
12501245
; SSE2: # BB#0:
1251-
; SSE2-NEXT: movaps %xmm1, %xmm2
1252-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1253-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1254-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm1[1,3]
1255-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1256-
; SSE2-NEXT: movaps %xmm2, %xmm0
1246+
; SSE2-NEXT: movaps %xmm1, %xmm0
12571247
; SSE2-NEXT: retq
12581248
;
12591249
; SSSE3-LABEL: combine_test6:
@@ -1601,21 +1591,13 @@ define <4 x i32> @combine_test20(<4 x i32> %a, <4 x i32> %b) {
16011591
define <4 x float> @combine_test1b(<4 x float> %a, <4 x float> %b) {
16021592
; SSE2-LABEL: combine_test1b:
16031593
; SSE2: # BB#0:
1604-
; SSE2-NEXT: movaps %xmm1, %xmm2
1605-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1606-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1607-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm2[0,0]
1608-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm2[2,0]
1594+
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,2,0]
16091595
; SSE2-NEXT: movaps %xmm1, %xmm0
16101596
; SSE2-NEXT: retq
16111597
;
16121598
; SSSE3-LABEL: combine_test1b:
16131599
; SSSE3: # BB#0:
1614-
; SSSE3-NEXT: movaps %xmm1, %xmm2
1615-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1616-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1617-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm2[0,0]
1618-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm2[2,0]
1600+
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,2,0]
16191601
; SSSE3-NEXT: movaps %xmm1, %xmm0
16201602
; SSSE3-NEXT: retq
16211603
;
@@ -1637,36 +1619,25 @@ define <4 x float> @combine_test1b(<4 x float> %a, <4 x float> %b) {
16371619
define <4 x float> @combine_test2b(<4 x float> %a, <4 x float> %b) {
16381620
; SSE2-LABEL: combine_test2b:
16391621
; SSE2: # BB#0:
1640-
; SSE2-NEXT: movaps %xmm1, %xmm2
1641-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1642-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1643-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,0],xmm1[1,1]
1644-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1645-
; SSE2-NEXT: movaps %xmm2, %xmm0
1622+
; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0,0]
1623+
; SSE2-NEXT: movaps %xmm1, %xmm0
16461624
; SSE2-NEXT: retq
16471625
;
16481626
; SSSE3-LABEL: combine_test2b:
16491627
; SSSE3: # BB#0:
1650-
; SSSE3-NEXT: movaps %xmm1, %xmm2
1651-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1652-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1653-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,0],xmm1[1,1]
1654-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1655-
; SSSE3-NEXT: movaps %xmm2, %xmm0
1628+
; SSSE3-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0]
1629+
; SSSE3-NEXT: movapd %xmm1, %xmm0
16561630
; SSSE3-NEXT: retq
16571631
;
16581632
; SSE41-LABEL: combine_test2b:
16591633
; SSE41: # BB#0:
1660-
; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
1661-
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[1,1]
1662-
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1634+
; SSE41-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0,0]
1635+
; SSE41-NEXT: movapd %xmm1, %xmm0
16631636
; SSE41-NEXT: retq
16641637
;
16651638
; AVX-LABEL: combine_test2b:
16661639
; AVX: # BB#0:
1667-
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
1668-
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[1,1]
1669-
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1640+
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0,0]
16701641
; AVX-NEXT: retq
16711642
%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
16721643
%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 0, i32 5>
@@ -1698,21 +1669,13 @@ define <4 x float> @combine_test3b(<4 x float> %a, <4 x float> %b) {
16981669
define <4 x float> @combine_test4b(<4 x float> %a, <4 x float> %b) {
16991670
; SSE2-LABEL: combine_test4b:
17001671
; SSE2: # BB#0:
1701-
; SSE2-NEXT: movaps %xmm1, %xmm2
1702-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1703-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1704-
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[3,0]
1705-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[0,2]
1672+
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3]
17061673
; SSE2-NEXT: movaps %xmm1, %xmm0
17071674
; SSE2-NEXT: retq
17081675
;
17091676
; SSSE3-LABEL: combine_test4b:
17101677
; SSSE3: # BB#0:
1711-
; SSSE3-NEXT: movaps %xmm1, %xmm2
1712-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm0[1,3]
1713-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
1714-
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[3,0]
1715-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm2[0,2]
1678+
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3]
17161679
; SSSE3-NEXT: movaps %xmm1, %xmm0
17171680
; SSSE3-NEXT: retq
17181681
;
@@ -1968,17 +1931,11 @@ define <4 x float> @combine_blend_01(<4 x float> %a, <4 x float> %b) {
19681931
; SSE2-LABEL: combine_blend_01:
19691932
; SSE2: # BB#0:
19701933
; SSE2-NEXT: movsd %xmm1, %xmm0
1971-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
1972-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
1973-
; SSE2-NEXT: movaps %xmm1, %xmm0
19741934
; SSE2-NEXT: retq
19751935
;
19761936
; SSSE3-LABEL: combine_blend_01:
19771937
; SSSE3: # BB#0:
19781938
; SSSE3-NEXT: movsd %xmm1, %xmm0
1979-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
1980-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
1981-
; SSSE3-NEXT: movaps %xmm1, %xmm0
19821939
; SSSE3-NEXT: retq
19831940
;
19841941
; SSE41-LABEL: combine_blend_01:
@@ -2113,16 +2070,12 @@ define <4 x i32> @combine_test_movhl_3(<4 x i32> %a, <4 x i32> %b) {
21132070
define <4 x float> @combine_undef_input_test1(<4 x float> %a, <4 x float> %b) {
21142071
; SSE2-LABEL: combine_undef_input_test1:
21152072
; SSE2: # BB#0:
2116-
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
2117-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[1,2]
2118-
; SSE2-NEXT: movaps %xmm1, %xmm0
2073+
; SSE2-NEXT: movsd %xmm1, %xmm0
21192074
; SSE2-NEXT: retq
21202075
;
21212076
; SSSE3-LABEL: combine_undef_input_test1:
21222077
; SSSE3: # BB#0:
2123-
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
2124-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[1,2]
2125-
; SSSE3-NEXT: movaps %xmm1, %xmm0
2078+
; SSSE3-NEXT: movsd %xmm1, %xmm0
21262079
; SSSE3-NEXT: retq
21272080
;
21282081
; SSE41-LABEL: combine_undef_input_test1:
@@ -2302,16 +2255,12 @@ define <4 x float> @combine_undef_input_test10(<4 x float> %a) {
23022255
define <4 x float> @combine_undef_input_test11(<4 x float> %a, <4 x float> %b) {
23032256
; SSE2-LABEL: combine_undef_input_test11:
23042257
; SSE2: # BB#0:
2305-
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
2306-
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[1,2]
2307-
; SSE2-NEXT: movaps %xmm1, %xmm0
2258+
; SSE2-NEXT: movsd %xmm1, %xmm0
23082259
; SSE2-NEXT: retq
23092260
;
23102261
; SSSE3-LABEL: combine_undef_input_test11:
23112262
; SSSE3: # BB#0:
2312-
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
2313-
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[1,2]
2314-
; SSSE3-NEXT: movaps %xmm1, %xmm0
2263+
; SSSE3-NEXT: movsd %xmm1, %xmm0
23152264
; SSSE3-NEXT: retq
23162265
;
23172266
; SSE41-LABEL: combine_undef_input_test11:

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