Removed SIZEOF_* constants, renamings, convience lambda, feedback applied

Author: JanekvO

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

@@ -436,36 +436,34 @@ AMDGPUAsmPrinter::getAmdhsaKernelDescriptor(const MachineFunction &MF,
   const Function &F = MF.getFunction();
   const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
 
+  auto CreateExpr = [&MF](int64_t Value) {
+    return MCConstantExpr::create(Value, MF.getContext());
+  };
+
   MCKernelDescriptor KernelDescriptor;
 
   assert(isUInt<32>(PI.ScratchSize));
   assert(isUInt<32>(PI.getComputePGMRSrc1(STM)));
   assert(isUInt<32>(PI.getComputePGMRSrc2()));
 
-  KernelDescriptor.group_segment_fixed_size =
-      MCConstantExpr::create(PI.LDSSize, MF.getContext());
-  KernelDescriptor.private_segment_fixed_size =
-      MCConstantExpr::create(PI.ScratchSize, MF.getContext());
+  KernelDescriptor.group_segment_fixed_size = CreateExpr(PI.LDSSize);
+  KernelDescriptor.private_segment_fixed_size = CreateExpr(PI.ScratchSize);
 
   Align MaxKernArgAlign;
-  KernelDescriptor.kernarg_size = MCConstantExpr::create(
-      STM.getKernArgSegmentSize(F, MaxKernArgAlign), MF.getContext());
+  KernelDescriptor.kernarg_size =
+      CreateExpr(STM.getKernArgSegmentSize(F, MaxKernArgAlign));
 
-  KernelDescriptor.compute_pgm_rsrc1 =
-      MCConstantExpr::create(PI.getComputePGMRSrc1(STM), MF.getContext());
-  KernelDescriptor.compute_pgm_rsrc2 =
-      MCConstantExpr::create(PI.getComputePGMRSrc2(), MF.getContext());
-  KernelDescriptor.kernel_code_properties = MCConstantExpr::create(
-      getAmdhsaKernelCodeProperties(MF), MF.getContext());
+  KernelDescriptor.compute_pgm_rsrc1 = CreateExpr(PI.getComputePGMRSrc1(STM));
+  KernelDescriptor.compute_pgm_rsrc2 = CreateExpr(PI.getComputePGMRSrc2());
+  KernelDescriptor.kernel_code_properties =
+      CreateExpr(getAmdhsaKernelCodeProperties(MF));
 
   assert(STM.hasGFX90AInsts() || CurrentProgramInfo.ComputePGMRSrc3GFX90A == 0);
-  KernelDescriptor.compute_pgm_rsrc3 = MCConstantExpr::create(
-      STM.hasGFX90AInsts() ? CurrentProgramInfo.ComputePGMRSrc3GFX90A : 0,
-      MF.getContext());
+  KernelDescriptor.compute_pgm_rsrc3 = CreateExpr(
+      STM.hasGFX90AInsts() ? CurrentProgramInfo.ComputePGMRSrc3GFX90A : 0);
 
-  KernelDescriptor.kernarg_preload = MCConstantExpr::create(
-      AMDGPU::hasKernargPreload(STM) ? Info->getNumKernargPreloadedSGPRs() : 0,
-      MF.getContext());
+  KernelDescriptor.kernarg_preload = CreateExpr(
+      AMDGPU::hasKernargPreload(STM) ? Info->getNumKernargPreloadedSGPRs() : 0);
 
   return KernelDescriptor;
 }

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

@@ -5488,15 +5488,17 @@ bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {
                  IDRange);
 
     if (ID == ".amdhsa_group_segment_fixed_size") {
-      if (!isUInt<SIZEOF_GROUP_SEGMENT_FIXED_SIZE * CHAR_BIT>(Val))
+      if (!isUInt<sizeof(kernel_descriptor_t::group_segment_fixed_size) *
+                  CHAR_BIT>(Val))
         return OutOfRangeError(ValRange);
       KD.group_segment_fixed_size = ExprVal;
     } else if (ID == ".amdhsa_private_segment_fixed_size") {
-      if (!isUInt<SIZEOF_PRIVATE_SEGMENT_FIXED_SIZE * CHAR_BIT>(Val))
+      if (!isUInt<sizeof(kernel_descriptor_t::private_segment_fixed_size) *
+                  CHAR_BIT>(Val))
         return OutOfRangeError(ValRange);
       KD.private_segment_fixed_size = ExprVal;
     } else if (ID == ".amdhsa_kernarg_size") {
-      if (!isUInt<SIZEOF_KERNARG_SIZE * CHAR_BIT>(Val))
+      if (!isUInt<sizeof(kernel_descriptor_t::kernarg_size) * CHAR_BIT>(Val))
         return OutOfRangeError(ValRange);
       KD.kernarg_size = ExprVal;
     } else if (ID == ".amdhsa_user_sgpr_count") {

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.h

@@ -39,29 +39,6 @@ struct MCKernelDescriptor {
                                 uint32_t Mask, MCContext &Ctx);
 };
 
-enum : uint32_t {
-  SIZEOF_GROUP_SEGMENT_FIXED_SIZE =
-      sizeof(amdhsa::kernel_descriptor_t::group_segment_fixed_size),
-  SIZEOF_PRIVATE_SEGMENT_FIXED_SIZE =
-      sizeof(amdhsa::kernel_descriptor_t::private_segment_fixed_size),
-  SIZEOF_KERNARG_SIZE = sizeof(amdhsa::kernel_descriptor_t::kernarg_size),
-  SIZEOF_RESERVED0 = sizeof(amdhsa::kernel_descriptor_t::reserved0),
-  SIZEOF_KERNEL_CODE_ENTRY_BYTE_OFFSET =
-      sizeof(amdhsa::kernel_descriptor_t::kernel_code_entry_byte_offset),
-  SIZEOF_RESERVED1 = sizeof(amdhsa::kernel_descriptor_t::reserved1),
-  SIZEOF_COMPUTE_PGM_RSRC3 =
-      sizeof(amdhsa::kernel_descriptor_t::compute_pgm_rsrc3),
-  SIZEOF_COMPUTE_PGM_RSRC1 =
-      sizeof(amdhsa::kernel_descriptor_t::compute_pgm_rsrc1),
-  SIZEOF_COMPUTE_PGM_RSRC2 =
-      sizeof(amdhsa::kernel_descriptor_t::compute_pgm_rsrc2),
-  SIZEOF_KERNEL_CODE_PROPERTIES =
-      sizeof(amdhsa::kernel_descriptor_t::kernel_code_properties),
-  SIZEOF_KERNARG_PRELOAD = sizeof(amdhsa::kernel_descriptor_t::kernarg_preload),
-  SIZEOF_RESERVED3 = sizeof(amdhsa::kernel_descriptor_t::reserved3),
-  SIZEOF_KERNEL_DESCRIPTOR = sizeof(amdhsa::kernel_descriptor_t)
-};
-
 } // end namespace AMDGPU
 } // end namespace llvm