Skip to content

Commit 6e535a9

Browse files
nashermjthackray
nasherm
and
jthackray
authored
[LLVM][MC][AArch64] Assembler support for Armv9.6-A memory systems extensions (#112341)
Add support for the following Armv9.6-A memory systems extensions: FEAT_LSUI - Unprivileged Load Store FEAT_OCCMO - Outer Cacheable Cache Maintenance Operation FEAT_PCDPHINT - Producer-Consumer Data Placement Hints FEAT_SRMASK - Bitwise System Register Write Masks as documented here: https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-6-architecture-extension Co-authored-by: Jonathan Thackray <[email protected]> --------- Co-authored-by: Jonathan Thackray <[email protected]>
1 parent a18826d commit 6e535a9

23 files changed

+1797
-38
lines changed

‎clang/test/Driver/aarch64-v96a.c

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,3 +53,16 @@
5353
// RUN: %clang -target aarch64 -march=armv9.6a+sve-f16f32mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-F16F32MM %s
5454
// RUN: %clang -target aarch64 -march=armv9.6-a+sve-f16f32mm -### -c %s 2>&1 | FileCheck -check-prefix=V96A-SVE-F16F32MM %s
5555
// V96A-SVE-F16F32MM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+sve-f16f32mm"
56+
//
57+
// RUN: %clang -target aarch64 -march=armv9.6a+lsui -### -c %s 2>&1 | FileCheck -check-prefix=V96A-LSUI %s
58+
// RUN: %clang -target aarch64 -march=armv9.6-a+lsui -### -c %s 2>&1 | FileCheck -check-prefix=V96A-LSUI %s
59+
// V96A-LSUI: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+lsui"
60+
//
61+
// RUN: %clang -target aarch64 -march=armv9.6a+occmo -### -c %s 2>&1 | FileCheck -check-prefix=V96A-OCCMO %s
62+
// RUN: %clang -target aarch64 -march=armv9.6-a+occmo -### -c %s 2>&1 | FileCheck -check-prefix=V96A-OCCMO %s
63+
// V96A-OCCMO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+occmo"
64+
//
65+
// RUN: %clang -target aarch64 -march=armv9.6a+pcdphint -### -c %s 2>&1 | FileCheck -check-prefix=V96A-PCDPHINT %s
66+
// RUN: %clang -target aarch64 -march=armv9.6-a+pcdphint -### -c %s 2>&1 | FileCheck -check-prefix=V96A-PCDPHINT %s
67+
// V96A-PCDPHINT: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v9.6a"{{.*}} "-target-feature" "+pcdphint"
68+
//

‎clang/test/Driver/print-supported-extensions-aarch64.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,15 @@
4040
// CHECK-NEXT: lse FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
4141
// CHECK-NEXT: lse128 FEAT_LSE128 Enable Armv9.4-A 128-bit Atomic instructions
4242
// CHECK-NEXT: lsfe FEAT_LSFE Enable Armv9.6-A base Atomic floating-point in-memory instructions
43+
// CHECK-NEXT: lsui FEAT_LSUI Enable Armv9.6-A unprivileged load/store instructions
4344
// CHECK-NEXT: lut FEAT_LUT Enable Lookup Table instructions
4445
// CHECK-NEXT: mops FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions
4546
// CHECK-NEXT: memtag FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
4647
// CHECK-NEXT: simd FEAT_AdvSIMD Enable Advanced SIMD instructions
48+
// CHECK-NEXT: occmo FEAT_OCCMO Enable Armv9.6-A Outer cacheable cache maintenance operations
4749
// CHECK-NEXT: pauth FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension
4850
// CHECK-NEXT: pauth-lr FEAT_PAuth_LR Enable Armv9.5-A PAC enhancements
51+
// CHECK-NEXT: pcdphint FEAT_PCDPHINT Enable Armv9.6-A Producer Consumer Data Placement hints
4952
// CHECK-NEXT: pmuv3 FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
5053
// CHECK-NEXT: predres FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
5154
// CHECK-NEXT: rng FEAT_RNG Enable Random Number generation instructions

‎llvm/lib/Target/AArch64/AArch64Features.td

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -439,7 +439,7 @@ def FeatureSVEB16B16: ExtensionWithMArch<"sve-b16b16", "SVEB16B16", "FEAT_SVE_B1
439439
"Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions">;
440440

441441
def FeatureSMEB16B16 : ExtensionWithMArch<"sme-b16b16", "SMEB16B16", "FEAT_SME_B16B16",
442-
"Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",
442+
"Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",
443443
[FeatureSME2, FeatureSVEB16B16]>;
444444

445445
def FeatureSMEF16F16 : ExtensionWithMArch<"sme-f16f16", "SMEF16F16", "FEAT_SME_F16F16",
@@ -478,10 +478,10 @@ def FeatureFAMINMAX: ExtensionWithMArch<"faminmax", "FAMINMAX", "FEAT_FAMINMAX",
478478

479479
def FeatureLUT: ExtensionWithMArch<"lut", "LUT", "FEAT_LUT",
480480
"Enable Lookup Table instructions">;
481-
481+
482482
def FeatureFP8 : ExtensionWithMArch<"fp8", "FP8", "FEAT_FP8",
483483
"Enable FP8 instructions", [FeatureFAMINMAX, FeatureLUT, FeatureBF16]>;
484-
484+
485485
def FeatureFP8FMA : ExtensionWithMArch<"fp8fma", "FP8FMA", "FEAT_FP8FMA",
486486
"Enable Armv9.5-A FP8 multiply-add instructions", [FeatureFP8]>;
487487

@@ -490,7 +490,7 @@ def FeatureSSVE_FP8FMA : ExtensionWithMArch<"ssve-fp8fma", "SSVE_FP8FMA", "FEAT_
490490

491491
def FeatureFP8DOT4: ExtensionWithMArch<"fp8dot4", "FP8DOT4", "FEAT_FP8DOT4",
492492
"Enable FP8 4-way dot instructions", [FeatureFP8FMA]>;
493-
493+
494494
def FeatureFP8DOT2: ExtensionWithMArch<"fp8dot2", "FP8DOT2", "FEAT_FP8DOT2",
495495
"Enable FP8 2-way dot instructions", [FeatureFP8DOT4]>;
496496

@@ -555,6 +555,14 @@ def FeatureSVEBFSCALE: ExtensionWithMArch<"sve-bfscale", "SVE_BFSCALE", "FEAT_SV
555555

556556
def FeatureSVE_F16F32MM: ExtensionWithMArch<"sve-f16f32mm", "SVE_F16F32MM", "FEAT_SVE_F16F32MM",
557557
"Enable Armv9.6-A FP16 to FP32 Matrix Multiply instructions">;
558+
def FeatureLSUI: ExtensionWithMArch<"lsui", "LSUI", "FEAT_LSUI",
559+
"Enable Armv9.6-A unprivileged load/store instructions">;
560+
561+
def FeatureOCCMO: ExtensionWithMArch<"occmo", "OCCMO", "FEAT_OCCMO",
562+
"Enable Armv9.6-A Outer cacheable cache maintenance operations">;
563+
564+
def FeaturePCDPHINT: ExtensionWithMArch<"pcdphint", "PCDPHINT", "FEAT_PCDPHINT",
565+
"Enable Armv9.6-A Producer Consumer Data Placement hints">;
558566

559567
//===----------------------------------------------------------------------===//
560568
// Other Features
@@ -866,8 +874,9 @@ def HasV9_5aOps : Architecture64<9, 5, "a", "v9.5a",
866874
[HasV9_4aOps, FeatureCPA],
867875
!listconcat(HasV9_4aOps.DefaultExts, [FeatureCPA, FeatureLUT, FeatureFAMINMAX])>;
868876
def HasV9_6aOps : Architecture64<9, 6, "a", "v9.6a",
869-
[HasV9_5aOps, FeatureCMPBR, FeatureFPRCVT, FeatureSVE2p2],
870-
!listconcat(HasV9_5aOps.DefaultExts, [FeatureCMPBR, FeatureFPRCVT, FeatureSVE2p2])>;
877+
[HasV9_5aOps, FeatureCMPBR, FeatureFPRCVT, FeatureSVE2p2, FeatureLSUI, FeatureOCCMO],
878+
!listconcat(HasV9_5aOps.DefaultExts, [FeatureCMPBR, FeatureFPRCVT, FeatureSVE2p2,
879+
FeatureLSUI, FeatureOCCMO])>;
871880
def HasV8_0rOps : Architecture64<8, 0, "r", "v8r",
872881
[ //v8.1
873882
FeatureCRC, FeaturePAN, FeatureLSE, FeatureCONTEXTIDREL2,

0 commit comments

Comments
 (0)