Skip to content

Commit 6ee3f45

Browse files
momchil-velikovmomchil-velikov
committed
[fixup] Fix incorrect dependency on sme2p1
1 parent 2f96bd7 commit 6ee3f45

File tree

3 files changed

+17
-17
lines changed

3 files changed

+17
-17
lines changed

‎clang/include/clang/Basic/arm_sme.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -458,7 +458,7 @@ let TargetGuard = "sme2,sme-f64f64" in {
458458
def SVMLS_LANE_VG1x4_F64 : Inst<"svmls_lane_za64[_{d}]_vg1x4", "vm4di", "d", MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>;
459459
}
460460

461-
let TargetGuard = "sme2p1,sme-f16f16" in {
461+
let TargetGuard = "sme-f16f16" in {
462462
def SVMLA_MULTI_VG1x2_F16 : Inst<"svmla_za16[_f16]_vg1x2", "vm22", "h", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
463463
def SVMLA_MULTI_VG1x4_F16 : Inst<"svmla_za16[_f16]_vg1x4", "vm44", "h", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
464464
def SVMLS_MULTI_VG1x2_F16 : Inst<"svmls_za16[_f16]_vg1x2", "vm22", "h", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>;

‎clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
2-
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2p1 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3-
// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2p1 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
4-
// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2p1 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5-
// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2p1 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
2+
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3+
// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
4+
// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5+
// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
66

77
// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sme2p1 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall %s -o /dev/null
88

‎clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -14,29 +14,29 @@ void test_features_f16f16(uint32_t slice,
1414
svbfloat16x4_t bzn4, svbfloat16x4_t bzm4)
1515

1616
__arm_streaming __arm_inout("za") {
17-
// expected-error@+1 {{'svmla_single_za16_f16_vg1x2' needs target feature sme2p1,sme-f16f16}}
17+
// expected-error@+1 {{'svmla_single_za16_f16_vg1x2' needs target feature sme-f16f16}}
1818
svmla_single_za16_f16_vg1x2(slice, zn2, zm);
19-
// expected-error@+1 {{'svmla_single_za16_f16_vg1x4' needs target feature sme2p1,sme-f16f16}}
19+
// expected-error@+1 {{'svmla_single_za16_f16_vg1x4' needs target feature sme-f16f16}}
2020
svmla_single_za16_f16_vg1x4(slice, zn4, zm);
21-
// expected-error@+1 {{'svmls_single_za16_f16_vg1x2' needs target feature sme2p1,sme-f16f16}}
21+
// expected-error@+1 {{'svmls_single_za16_f16_vg1x2' needs target feature sme-f16f16}}
2222
svmls_single_za16_f16_vg1x2(slice, zn2, zm);
23-
// expected-error@+1 {{'svmls_single_za16_f16_vg1x4' needs target feature sme2p1,sme-f16f16}}
23+
// expected-error@+1 {{'svmls_single_za16_f16_vg1x4' needs target feature sme-f16f16}}
2424
svmls_single_za16_f16_vg1x4(slice, zn4, zm);
25-
// expected-error@+1 {{'svmla_za16_f16_vg1x2' needs target feature sme2p1,sme-f16f16}}
25+
// expected-error@+1 {{'svmla_za16_f16_vg1x2' needs target feature sme-f16f16}}
2626
svmla_za16_f16_vg1x2(slice, zn2, zm2);
27-
// expected-error@+1 {{'svmla_za16_f16_vg1x4' needs target feature sme2p1,sme-f16f16}}
27+
// expected-error@+1 {{'svmla_za16_f16_vg1x4' needs target feature sme-f16f16}}
2828
svmla_za16_f16_vg1x4(slice, zn4, zm4);
29-
// expected-error@+1 {{'svmls_za16_f16_vg1x2' needs target feature sme2p1,sme-f16f16}}
29+
// expected-error@+1 {{'svmls_za16_f16_vg1x2' needs target feature sme-f16f16}}
3030
svmls_za16_f16_vg1x2(slice, zn2, zm2);
31-
// expected-error@+1 {{'svmls_za16_f16_vg1x4' needs target feature sme2p1,sme-f16f16}}
31+
// expected-error@+1 {{'svmls_za16_f16_vg1x4' needs target feature sme-f16f16}}
3232
svmls_za16_f16_vg1x4(slice, zn4, zm4);
33-
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x2' needs target feature sme2p1,sme-f16f16}}
33+
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x2' needs target feature sme-f16f16}}
3434
svmla_lane_za16_f16_vg1x2(slice, zn2, zm, 7);
35-
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x4' needs target feature sme2p1,sme-f16f16}}
35+
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x4' needs target feature sme-f16f16}}
3636
svmla_lane_za16_f16_vg1x4(slice, zn4, zm, 7);
37-
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x2' needs target feature sme2p1,sme-f16f16}}
37+
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x2' needs target feature sme-f16f16}}
3838
svmls_lane_za16_f16_vg1x2(slice, zn2, zm, 7);
39-
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x4' needs target feature sme2p1,sme-f16f16}}
39+
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x4' needs target feature sme-f16f16}}
4040
svmls_lane_za16_f16_vg1x4(slice, zn4, zm, 7);
4141

4242
// expected-error@+1 {{'svmla_single_za16_bf16_vg1x2' needs target feature sme2,b16b16}}

0 commit comments

Comments
 (0)