rename utility function

Author: broxigarchen

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

@@ -3578,10 +3578,11 @@ SDValue AMDGPUTargetLowering::LowerFP_TO_FP16(SDValue Op, SelectionDAG &DAG) con
     return SDValue();
   }
 
-  return LowerF64ToF16(N0, DL, DAG);
+  return LowerF64ToF16Safe(N0, DL, DAG);
 }
 
-SDValue AMDGPUTargetLowering::LowerF64ToF16(SDValue Src, const SDLoc &DL,
+// return node in i32
+SDValue AMDGPUTargetLowering::LowerF64ToF16Safe(SDValue Src, const SDLoc &DL,
                                             SelectionDAG &DAG) const {
   assert(Src.getSimpleValueType() == MVT::f64);
 

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h

@@ -97,7 +97,7 @@ class AMDGPUTargetLowering : public TargetLowering {
   SDValue LowerFP_TO_FP16(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const;
 
-  SDValue LowerF64ToF16(SDValue Src, const SDLoc &DL, SelectionDAG &DAG) const;
+  SDValue LowerF64ToF16Safe(SDValue Src, const SDLoc &DL, SelectionDAG &DAG) const;
 
   SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
 

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -6909,7 +6909,7 @@ SDValue SITargetLowering::lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
       SDValue Src32 = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, Src, Flags);
       return DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, Src32, Flags);
     }
-    SDValue FpToFp16 = LowerF64ToF16(Src, DL, DAG);
+    SDValue FpToFp16 = LowerF64ToF16Safe(Src, DL, DAG);
     SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, MVT::i16, FpToFp16);
     return DAG.getNode(ISD::BITCAST, DL, MVT::f16, Trunc);
   }