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R600/SI: Fix mad*k definitions
llvm-svn: 230146
1 parent fccc3ab commit 70120fa

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4 files changed

+40
-2
lines changed

4 files changed

+40
-2
lines changed

llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -291,6 +291,8 @@ void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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printImmediate64(Op.getImm(), O);
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else
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llvm_unreachable("Invalid register class size");
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} else if (Desc.OpInfo[OpNo].OperandType == MCOI::OPERAND_IMMEDIATE) {
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printImmediate32(Op.getImm(), O);
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} else {
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// We hit this for the immediate instruction bits that don't yet have a
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// custom printer.

llvm/lib/Target/R600/SIInstrFormats.td

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -298,6 +298,21 @@ class VOP2e <bits<6> op> : Enc32 {
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let Inst{31} = 0x0; //encoding
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}
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class VOP2_MADKe <bits<6> op> : Enc64 {
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bits<8> vdst;
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bits<9> src0;
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bits<8> vsrc1;
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bits<32> src2;
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let Inst{8-0} = src0;
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let Inst{16-9} = vsrc1;
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let Inst{24-17} = vdst;
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let Inst{30-25} = op;
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let Inst{31} = 0x0; // encoding
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let Inst{63-32} = src2;
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}
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class VOP3e <bits<9> op> : Enc64 {
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bits<8> vdst;
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bits<2> src0_modifiers;

llvm/lib/Target/R600/SIInstrInfo.td

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -801,6 +801,10 @@ def VOP_I64_I32_I64 : VOPProfile <[i64, i32, i64, untyped]>;
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def VOP_I64_I64_I64 : VOPProfile <[i64, i64, i64, untyped]>;
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def VOP_F32_F32_F32_F32 : VOPProfile <[f32, f32, f32, f32]>;
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def VOP_MADK : VOPProfile <[f32, f32, f32, f32]> {
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field dag Ins = (ins VCSrc_32:$src0, VGPR_32:$vsrc1, u32imm:$src2);
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field string Asm = " $dst, $src0, $vsrc1, $src2";
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}
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def VOP_F64_F64_F64_F64 : VOPProfile <[f64, f64, f64, f64]>;
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def VOP_I32_I32_I32_I32 : VOPProfile <[i32, i32, i32, i32]>;
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def VOP_I64_I32_I32_I64 : VOPProfile <[i64, i32, i32, i64]>;
@@ -1205,6 +1209,23 @@ multiclass VOP2_VI3_Inst <vop23 op, string opName, VOPProfile P,
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revOp, P.HasModifiers
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>;
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multiclass VOP2MADK <vop2 op, string opName, list<dag> pattern = []> {
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def "" : VOP2_Pseudo <VOP_MADK.Outs, VOP_MADK.Ins, pattern, opName>;
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let isCodeGenOnly = 0 in {
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def _si : VOP2Common <VOP_MADK.Outs, VOP_MADK.Ins,
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!strconcat(opName, VOP_MADK.Asm), []>,
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SIMCInstr <opName#"_e32", SISubtarget.SI>,
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VOP2_MADKe <op.SI>;
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def _vi : VOP2Common <VOP_MADK.Outs, VOP_MADK.Ins,
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!strconcat(opName, VOP_MADK.Asm), []>,
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SIMCInstr <opName#"_e32", SISubtarget.VI>,
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VOP2_MADKe <op.VI>;
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} // End isCodeGenOnly = 0
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}
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class VOPC_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> :
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VOPCCommon <ins, "", pattern>,
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VOP <opName>,

llvm/lib/Target/R600/SIInstructions.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1494,10 +1494,10 @@ defm V_XOR_B32 : VOP2Inst <vop2<0x1d, 0x15>, "v_xor_b32", VOP_I32_I32_I32>;
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defm V_MAC_F32 : VOP2Inst <vop2<0x1f, 0x16>, "v_mac_f32", VOP_F32_F32_F32>;
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} // End isCommutable = 1
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1497-
defm V_MADMK_F32 : VOP2Inst <vop2<0x20, 0x17>, "v_madmk_f32", VOP_F32_F32_F32>;
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defm V_MADMK_F32 : VOP2MADK <vop2<0x20, 0x17>, "v_madmk_f32">;
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let isCommutable = 1 in {
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defm V_MADAK_F32 : VOP2Inst <vop2<0x21, 0x18>, "v_madak_f32", VOP_F32_F32_F32>;
1500+
defm V_MADAK_F32 : VOP2MADK <vop2<0x21, 0x18>, "v_madak_f32">;
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} // End isCommutable = 1
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let isCommutable = 1, Defs = [VCC] in { // Carry-out goes to VCC

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