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[DWARF][RISCV] Test resolving of RISC-V relocations
Summary: This patch adds an object file (in yaml format) with a synthetic .debug_info section which we use to test that the supported RISC-V relocations are properly resolved. Reviewers: asb, lenary, MaskRay Reviewed By: MaskRay Tags: #llvm Differential Revision: https://reviews.llvm.org/D70541
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‎llvm/test/tools/llvm-dwarfdump/RISCV/lit.local.cfg

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if not 'RISCV' in config.root.targets:
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config.unsupported = True

‎llvm/test/tools/llvm-dwarfdump/RISCV/riscv-relocs.yaml

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# Tests RISC-V relocations. We provide a .debug_info section with multiple
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# DW_AT_high_pc entries (that's one of the attributes for which relocations are
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# resolved by llvm-dwarfdump) and we add a relocation for each of them.
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#
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# RUN: yaml2obj %s | llvm-dwarfdump - | FileCheck %s
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# To add more tests you need to modify the Content of the .debug_abbrev and
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# .debug_info sections. To do that create a test.s which matches the assembly
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# code below, run the command that follows and copy over the "Content" value of
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# the respective sections:
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#
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# ```
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# $ cat test.s
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# .section .debug_abbrev,"",@progbits
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# .byte 1 # Abbreviation Code
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# .byte 0x11 # DW_TAG_compile_unit
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# .byte 0 # DW_CHILDREN_no
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#
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# # Add a DW_AT_high_pc for each relocation we test.
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# .rept 14 # (UPDATE HERE)
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# .byte 0x12 # DW_AT_high_pc
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# .byte 0x01 # DW_FORM_addr
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# .endr
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#
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# .byte 0 # EOM(1)
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# .byte 0 # EOM(2)
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# .byte 0 # EOM(3)
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#
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# .section .debug_info,"",@progbits
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# .4byte 2+4+1+1+8*14 # Length of Unit (UPDATE HERE)
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# .2byte 4 # DWARF version number
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# .4byte .debug_abbrev # Offset Into Abbrev. Section
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# .byte 8 # Address Size (in bytes)
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# .byte 1 # Abbrev 1
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# .8byte 0x00000000000042 # Test 1
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# .8byte 0x00000000000042 # Test 2
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# .8byte 0x00000000000042 # Test 3
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# .8byte 0x00000000000042 # Test 4
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# .8byte 0x00000000000042 # Test 5
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# .8byte 0x00000000000042 # Test 6
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# .8byte 0x00000000000042 # Test 7
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# .8byte 0x00000000000042 # Test 8
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# .8byte 0x00000000004242 # Test 9
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# .8byte 0x00000000004242 # Test 10
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# .8byte 0x00000042424242 # Test 11
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# .8byte 0x00000042424242 # Test 12
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# .8byte 0x42424242424242 # Test 13
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# .8byte 0x42424242424242 # Test 14
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# $ llvm-mc test.s -filetype obj -triple riscv64 -o - | obj2yaml
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# ```
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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2LSB
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Type: ET_REL
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Machine: EM_RISCV
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Sections:
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- Name: .debug_abbrev
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Type: SHT_PROGBITS
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Content: 01110012011201120112011201120112011201120112011201120112011201000000
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- Name: .debug_info
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Type: SHT_PROGBITS
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Content: 78000000040000000000080142000000000000004200000000000000420000000000000042000000000000004200000000000000420000000000000042000000000000004200000000000000424200000000000042420000000000004242424200000000424242420000000042424242424242004242424242424200
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- Name: .rela.debug_info
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Type: SHT_RELA
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Flags: [ SHF_INFO_LINK ]
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Link: .symtab
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EntSize: 0x0000000000000018
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Info: .debug_info
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Relocations:
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# Test 1
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# 0x42 with R_RISCV_NONE(0x1) = 0x42
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# CHECK: DW_AT_high_pc (0x0000000000000042)
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- Offset: 0x000000000000000C # 0xC + 8*0
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Symbol: v1
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Type: R_RISCV_NONE
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# Test 2
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# 0x42 with R_RISCV_32(0xFFFFFFFFFFFFFFFF) = 0x00000000FFFFFFFF
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# CHECK-NEXT: DW_AT_high_pc (0x00000000ffffffff)
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- Offset: 0x0000000000000014 # 0xC + 8*1
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Symbol: vFFFFFFFFFFFFFFFF
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Type: R_RISCV_32
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# Test 3
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# 0x42 with R_RISCV_32_PCREL(0x4) = 0x4-0x1C = 0x00000000FFFFFFE8
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# CHECK-NEXT: DW_AT_high_pc (0x00000000ffffffe8)
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- Offset: 0x000000000000001C # 0xC + 8*2
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Symbol: v4
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Type: R_RISCV_32_PCREL
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# Test 4
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# 0x42 with R_RISCV_64(0xFFFFFFFFFFFFFFFF) = 0xFFFFFFFFFFFFFFFF
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# CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
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- Offset: 0x0000000000000024 # 0xC + 8*3
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Symbol: vFFFFFFFFFFFFFFFF
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Type: R_RISCV_64
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# Test 5
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# 0x42 with R_RISCV_SET6(1) = 0x41
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# CHECK-NEXT: DW_AT_high_pc (0x0000000000000041)
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- Offset: 0x000000000000002C # 0xC + 8*4
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Symbol: v1
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Type: R_RISCV_SET6
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# Test 6
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# 0x42 with R_RISCV_SUB6(0x4) = 0x7E
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# CHECK-NEXT: DW_AT_high_pc (0x000000000000007e)
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- Offset: 0x0000000000000034 # 0xC + 8*5
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Symbol: v4
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Type: R_RISCV_SUB6
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# Test 7
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# 0x42 with R_RISCV_ADD8(0x04020103) = 0x45
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# CHECK-NEXT: DW_AT_high_pc (0x0000000000000045)
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- Offset: 0x000000000000003C # 0xC + 8*6
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Symbol: v04020103
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Type: R_RISCV_ADD8
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# Test 8
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# 0x42 with R_RISCV_SUB8(0x04020103) = 0x3F
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# CHECK-NEXT: DW_AT_high_pc (0x000000000000003f)
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- Offset: 0x0000000000000044 # 0xC + 8*7
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Symbol: v04020103
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Type: R_RISCV_SUB8
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# Test 9
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# 0x4242 with R_RISCV_ADD16(0x04020103) = 0x4345
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# CHECK-NEXT: DW_AT_high_pc (0x0000000000004345)
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- Offset: 0x000000000000004C # 0xC + 8*8
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Symbol: v04020103
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Type: R_RISCV_ADD16
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# Test 10
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# 0x4242 with R_RISCV_SUB16(0x04020103) = 0x413F
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# CHECK-NEXT: DW_AT_high_pc (0x000000000000413f)
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- Offset: 0x0000000000000054 # 0xC + 8*9
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Symbol: v04020103
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Type: R_RISCV_SUB16
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# Test 11
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# 0x42424242 with R_RISCV_ADD32(0x04020103) = 0x46444345
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# CHECK-NEXT: DW_AT_high_pc (0x0000000046444345)
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- Offset: 0x000000000000005C # 0xC + 8*10
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Symbol: v04020103
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Type: R_RISCV_ADD32
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# Test 12
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# 0x42424242 with R_RISCV_SUB32(0x04020103) = 0x3E40413F
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# CHECK-NEXT: DW_AT_high_pc (0x000000003e40413f)
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- Offset: 0x0000000000000064 # 0xC + 8*11
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Symbol: v04020103
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Type: R_RISCV_SUB32
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# Test 13
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# 0x0042424242424242 with R_RISCV_ADD64(0x0100000000000000) = 0x0142424242424242
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# CHECK-NEXT: DW_AT_high_pc (0x0142424242424242)
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- Offset: 0x000000000000006C # 0xC + 8*12
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Symbol: v0100000000000000
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Type: R_RISCV_ADD64
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# Test 14
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# 0x0042424242424242 with R_RISCV_SUB64(0x0100000000000000) = 0xFF42424242424242
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# CHECK-NEXT: DW_AT_high_pc (0xff42424242424242)
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- Offset: 0x0000000000000074 # 0xC + 8*13
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Symbol: v0100000000000000
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Type: R_RISCV_SUB64
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Symbols:
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- Name: v1
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x0000000000000001
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- Name: v4
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x0000000000000004
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- Name: v04020103
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x0000000004020103
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- Name: vFFFFFFFFFFFFFFFF
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Type: STT_SECTION
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Section: .debug_info
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Value: 0xFFFFFFFFFFFFFFFF
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- Name: v0100000000000000
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x0100000000000000
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...

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