@@ -229,9 +229,6 @@ class SPIRVInstructionSelector : public InstructionSelector {
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bool selectSpvThreadId (Register ResVReg, const SPIRVType *ResType,
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MachineInstr &I) const ;
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- bool selectRadians (Register ResVReg, const SPIRVType *ResType,
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- MachineInstr &I) const ;
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-
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bool selectUnmergeValues (MachineInstr &I) const ;
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// Utilities
@@ -1754,45 +1751,6 @@ bool SPIRVInstructionSelector::selectSign(Register ResVReg,
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return Result;
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}
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- <<<<<<< HEAD
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- =======
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- bool SPIRVInstructionSelector::selectStep (Register ResVReg,
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- const SPIRVType *ResType,
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- MachineInstr &I) const {
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-
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- assert (I.getNumOperands () == 4 );
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- assert (I.getOperand (2 ).isReg ());
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- assert (I.getOperand (3 ).isReg ());
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- MachineBasicBlock &BB = *I.getParent ();
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-
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- return BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpExtInst))
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- .addDef (ResVReg)
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- .addUse (GR.getSPIRVTypeID (ResType))
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- .addImm (static_cast <uint32_t >(SPIRV::InstructionSet::GLSL_std_450))
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- .addImm (GL::Step)
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- .addUse (I.getOperand (2 ).getReg ())
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- .addUse (I.getOperand (3 ).getReg ())
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- .constrainAllUses (TII, TRI, RBI);
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- }
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-
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- bool SPIRVInstructionSelector::selectRadians (Register ResVReg,
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- const SPIRVType *ResType,
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- MachineInstr &I) const {
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-
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- assert (I.getNumOperands () == 3 );
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- assert (I.getOperand (2 ).isReg ());
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- MachineBasicBlock &BB = *I.getParent ();
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-
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- return BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpExtInst))
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- .addDef (ResVReg)
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- .addUse (GR.getSPIRVTypeID (ResType))
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- .addImm (static_cast <uint32_t >(SPIRV::InstructionSet::GLSL_std_450))
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- .addImm (GL::Radians)
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- .addUse (I.getOperand (2 ).getReg ())
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- .constrainAllUses (TII, TRI, RBI);
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- }
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-
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- >>>>>>> c520937ac3f9 (Added radians selection for spirv)
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bool SPIRVInstructionSelector::selectBitreverse (Register ResVReg,
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const SPIRVType *ResType,
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MachineInstr &I) const {
@@ -2575,8 +2533,9 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
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.addUse (GR.getOrCreateConstInt (3 , I, IntTy, TII));
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}
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case Intrinsic::spv_step:
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- <<<<<<< HEAD
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return selectExtInst (ResVReg, ResType, I, CL::step, GL::Step);
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+ case Intrinsic::spv_radians:
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+ return selectExtInst (ResVReg, ResType, I, CL::radians, GL::Radians);
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// Discard intrinsics which we do not expect to actually represent code after
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// lowering or intrinsics which are not implemented but should not crash when
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// found in a customer's LLVM IR input.
@@ -2585,11 +2544,6 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
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case Intrinsic::instrprof_value_profile:
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break ;
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// Discard internal intrinsics.
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- =======
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- return selectStep (ResVReg, ResType, I);
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- case Intrinsic::spv_radians:
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- return selectRadians (ResVReg, ResType, I);
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- >>>>>>> c520937ac3f9 (Added radians selection for spirv)
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case Intrinsic::spv_value_md:
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break ;
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default : {
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