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[CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM
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+76
-22
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8 files changed

+76
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Lines changed: 25 additions & 0 deletions
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@@ -0,0 +1,25 @@
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//===- llvm/CodeGen/RegUsageInfoCollector.h ---------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_REGUSAGEINFOCOLLECTOR_H
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#define LLVM_CODEGEN_REGUSAGEINFOCOLLECTOR_H
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#include "llvm/CodeGen/MachinePassManager.h"
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namespace llvm {
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class RegUsageInfoCollectorPass
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: public AnalysisInfoMixin<RegUsageInfoCollectorPass> {
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public:
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PreservedAnalyses run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM);
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};
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} // namespace llvm
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25+
#endif // LLVM_CODEGEN_REGUSAGEINFOCOLLECTOR_H

llvm/include/llvm/InitializePasses.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -257,7 +257,7 @@ void initializeRegAllocPriorityAdvisorAnalysisPass(PassRegistry &);
257257
void initializeRegAllocScoringPass(PassRegistry &);
258258
void initializeRegBankSelectPass(PassRegistry &);
259259
void initializeRegToMemWrapperPassPass(PassRegistry &);
260-
void initializeRegUsageInfoCollectorPass(PassRegistry &);
260+
void initializeRegUsageInfoCollectorLegacyPass(PassRegistry &);
261261
void initializeRegUsageInfoPropagationPass(PassRegistry &);
262262
void initializeRegionInfoPassPass(PassRegistry &);
263263
void initializeRegionOnlyPrinterPass(PassRegistry &);

llvm/include/llvm/Passes/CodeGenPassBuilder.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
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#include "llvm/CodeGen/PHIElimination.h"
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#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
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#include "llvm/CodeGen/RegAllocFast.h"
56+
#include "llvm/CodeGen/RegUsageInfoCollector.h"
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#include "llvm/CodeGen/RegisterUsageInfo.h"
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#include "llvm/CodeGen/ReplaceWithVeclib.h"
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#include "llvm/CodeGen/SafeStack.h"

llvm/include/llvm/Passes/MachinePassRegistry.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -155,6 +155,7 @@ MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
155155
MachinePostDominatorTreePrinterPass(dbgs()))
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MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(dbgs()))
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MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(dbgs()))
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MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
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MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
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RequireAllMachineFunctionPropertiesPass())
160161
MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass())
@@ -249,7 +250,6 @@ DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)
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DUMMY_MACHINE_FUNCTION_PASS("ra-basic", RABasicPass)
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DUMMY_MACHINE_FUNCTION_PASS("ra-greedy", RAGreedyPass)
251252
DUMMY_MACHINE_FUNCTION_PASS("ra-pbqp", RAPBQPPass)
252-
DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass)
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DUMMY_MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass)
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DUMMY_MACHINE_FUNCTION_PASS("regalloc", RegAllocPass)
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DUMMY_MACHINE_FUNCTION_PASS("regallocscoringpass", RegAllocScoringPass)

llvm/lib/CodeGen/CodeGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
113113
initializeRABasicPass(Registry);
114114
initializeRAGreedyPass(Registry);
115115
initializeRegAllocFastPass(Registry);
116-
initializeRegUsageInfoCollectorPass(Registry);
116+
initializeRegUsageInfoCollectorLegacyPass(Registry);
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initializeRegUsageInfoPropagationPass(Registry);
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initializeRegisterCoalescerPass(Registry);
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initializeRemoveLoadsIntoFakeUsesPass(Registry);

llvm/lib/CodeGen/RegUsageInfoCollector.cpp

Lines changed: 41 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,11 @@
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/RegUsageInfoCollector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachinePassManager.h"
2224
#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
2426
#include "llvm/CodeGen/RegisterUsageInfo.h"
@@ -36,11 +38,23 @@ STATISTIC(NumCSROpt,
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3739
namespace {
3840

39-
class RegUsageInfoCollector : public MachineFunctionPass {
41+
class RegUsageInfoCollector {
42+
PhysicalRegisterUsageInfo &PRUI;
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public:
45+
RegUsageInfoCollector(PhysicalRegisterUsageInfo &PRUI) : PRUI(PRUI) {}
46+
bool run(MachineFunction &MF);
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48+
// Call getCalleeSaves and then also set the bits for subregs and
49+
// fully saved superregs.
50+
static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
51+
};
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53+
class RegUsageInfoCollectorLegacy : public MachineFunctionPass {
4054
public:
41-
RegUsageInfoCollector() : MachineFunctionPass(ID) {
42-
PassRegistry &Registry = *PassRegistry::getPassRegistry();
43-
initializeRegUsageInfoCollectorPass(Registry);
55+
static char ID;
56+
RegUsageInfoCollectorLegacy() : MachineFunctionPass(ID) {
57+
initializeRegUsageInfoCollectorLegacyPass(*PassRegistry::getPassRegistry());
4458
}
4559

4660
StringRef getPassName() const override {
@@ -54,26 +68,19 @@ class RegUsageInfoCollector : public MachineFunctionPass {
5468
}
5569

5670
bool runOnMachineFunction(MachineFunction &MF) override;
57-
58-
// Call getCalleeSaves and then also set the bits for subregs and
59-
// fully saved superregs.
60-
static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
61-
62-
static char ID;
6371
};
64-
6572
} // end of anonymous namespace
6673

67-
char RegUsageInfoCollector::ID = 0;
74+
char RegUsageInfoCollectorLegacy::ID = 0;
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69-
INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector",
76+
INITIALIZE_PASS_BEGIN(RegUsageInfoCollectorLegacy, "RegUsageInfoCollector",
7077
"Register Usage Information Collector", false, false)
7178
INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfoWrapperLegacy)
72-
INITIALIZE_PASS_END(RegUsageInfoCollector, "RegUsageInfoCollector",
79+
INITIALIZE_PASS_END(RegUsageInfoCollectorLegacy, "RegUsageInfoCollector",
7380
"Register Usage Information Collector", false, false)
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7582
FunctionPass *llvm::createRegUsageInfoCollector() {
76-
return new RegUsageInfoCollector();
83+
return new RegUsageInfoCollectorLegacy();
7784
}
7885

7986
// TODO: Move to hook somwehere?
@@ -97,12 +104,29 @@ static bool isCallableFunction(const MachineFunction &MF) {
97104
}
98105
}
99106

100-
bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
107+
PreservedAnalyses
108+
RegUsageInfoCollectorPass::run(MachineFunction &MF,
109+
MachineFunctionAnalysisManager &MFAM) {
110+
Module &MFA = *MF.getFunction().getParent();
111+
auto *PRUI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
112+
.getCachedResult<PhysicalRegisterUsageInfoAnalysis>(MFA);
113+
assert(PRUI && "PhysicalRegisterUsageInfoAnalysis not available");
114+
RegUsageInfoCollector(*PRUI).run(MF);
115+
return PreservedAnalyses::all();
116+
}
117+
118+
bool RegUsageInfoCollectorLegacy::runOnMachineFunction(MachineFunction &MF) {
119+
PhysicalRegisterUsageInfo &PRUI =
120+
getAnalysis<PhysicalRegisterUsageInfoWrapperLegacy>().getPRUI();
121+
return RegUsageInfoCollector(PRUI).run(MF);
122+
}
123+
124+
bool RegUsageInfoCollector::run(MachineFunction &MF) {
101125
MachineRegisterInfo *MRI = &MF.getRegInfo();
102126
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
103127
const LLVMTargetMachine &TM = MF.getTarget();
104128

105-
LLVM_DEBUG(dbgs() << " -------------------- " << getPassName()
129+
LLVM_DEBUG(dbgs() << " -------------------- Reg Usage Info Collector"
106130
<< " -------------------- \nFunction Name : "
107131
<< MF.getName() << '\n');
108132

@@ -129,8 +153,6 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
129153

130154
const Function &F = MF.getFunction();
131155

132-
PhysicalRegisterUsageInfo &PRUI =
133-
getAnalysis<PhysicalRegisterUsageInfoWrapperLegacy>().getPRUI();
134156
PRUI.setTargetMachine(TM);
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136158
LLVM_DEBUG(dbgs() << "Clobbered Registers: ");

llvm/lib/Passes/PassBuilder.cpp

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Original file line numberDiff line numberDiff line change
@@ -118,6 +118,7 @@
118118
#include "llvm/CodeGen/PHIElimination.h"
119119
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
120120
#include "llvm/CodeGen/RegAllocFast.h"
121+
#include "llvm/CodeGen/RegUsageInfoCollector.h"
121122
#include "llvm/CodeGen/RegisterUsageInfo.h"
122123
#include "llvm/CodeGen/SafeStack.h"
123124
#include "llvm/CodeGen/SelectOptimize.h"

llvm/test/CodeGen/AMDGPU/ipra-regmask.ll

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@@ -1,5 +1,10 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
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4+
; RUN: llc -mtriple=amdgcn-amd-amdhsa -stop-after=irtranslator -o - %s \
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; RUN: | llc -x=mir -mtriple=amdgcn-amd-amdhsa -passes="module(require<reg-usage-info>,function(machine-function(reg-usage-collector)),print<regusage>)" -o /dev/null 2>&1 \
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; RUN: | FileCheck %s
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; Make sure the expected regmask is generated for sub/superregisters.
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510
; CHECK-DAG: csr Clobbered Registers: $vgpr0 $vgpr0_hi16 $vgpr0_lo16 $vgpr0_vgpr1 $vgpr0_vgpr1_vgpr2 $vgpr0_vgpr1_vgpr2_vgpr3 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 {{$}}

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