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[TableGen][GISel] Don't use std::optional with pointers (NFC) (#120026)
Pointers already have a well-defined null value.
1 parent ca60ee2 commit 73eecb7

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3 files changed

+59
-63
lines changed

3 files changed

+59
-63
lines changed

llvm/utils/TableGen/Common/CodeGenTarget.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ CodeGenRegBank &CodeGenTarget::getRegBank() const {
163163
return *RegBank;
164164
}
165165

166-
std::optional<CodeGenRegisterClass *> CodeGenTarget::getSuperRegForSubReg(
166+
const CodeGenRegisterClass *CodeGenTarget::getSuperRegForSubReg(
167167
const ValueTypeByHwMode &ValueTy, CodeGenRegBank &RegBank,
168168
const CodeGenSubRegIndex *SubIdx, bool MustBeAllocatable) const {
169169
std::vector<CodeGenRegisterClass *> Candidates;
@@ -192,7 +192,7 @@ std::optional<CodeGenRegisterClass *> CodeGenTarget::getSuperRegForSubReg(
192192

193193
// If we didn't find anything, we're done.
194194
if (Candidates.empty())
195-
return std::nullopt;
195+
return nullptr;
196196

197197
// Find and return the largest of our candidate classes.
198198
llvm::stable_sort(Candidates, [&](const CodeGenRegisterClass *A,

llvm/utils/TableGen/Common/CodeGenTarget.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ class CodeGenTarget {
124124

125125
/// Return the largest register class on \p RegBank which supports \p Ty and
126126
/// covers \p SubIdx if it exists.
127-
std::optional<CodeGenRegisterClass *>
127+
const CodeGenRegisterClass *
128128
getSuperRegForSubReg(const ValueTypeByHwMode &Ty, CodeGenRegBank &RegBank,
129129
const CodeGenSubRegIndex *SubIdx,
130130
bool MustBeAllocatable = false) const;

llvm/utils/TableGen/GlobalISelEmitter.cpp

Lines changed: 56 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -437,27 +437,26 @@ class GlobalISelEmitter final : public GlobalISelMatchTableExecutorEmitter {
437437
/// Infer a CodeGenRegisterClass for the type of \p SuperRegNode. The returned
438438
/// CodeGenRegisterClass will support the CodeGenRegisterClass of
439439
/// \p SubRegNode, and the subregister index defined by \p SubRegIdxNode.
440-
/// If no register class is found, return std::nullopt.
441-
std::optional<const CodeGenRegisterClass *>
440+
/// If no register class is found, return nullptr.
441+
const CodeGenRegisterClass *
442442
inferSuperRegisterClassForNode(const TypeSetByHwMode &Ty,
443443
const TreePatternNode &SuperRegNode,
444444
const TreePatternNode &SubRegIdxNode);
445-
std::optional<CodeGenSubRegIndex *>
445+
const CodeGenSubRegIndex *
446446
inferSubRegIndexForNode(const TreePatternNode &SubRegIdxNode);
447447

448448
/// Infer a CodeGenRegisterClass which suppoorts \p Ty and \p SubRegIdxNode.
449-
/// Return std::nullopt if no such class exists.
450-
std::optional<const CodeGenRegisterClass *>
449+
/// Return nullptr if no such class exists.
450+
const CodeGenRegisterClass *
451451
inferSuperRegisterClass(const TypeSetByHwMode &Ty,
452452
const TreePatternNode &SubRegIdxNode);
453453

454454
/// Return the CodeGenRegisterClass associated with \p Leaf if it has one.
455-
std::optional<const CodeGenRegisterClass *>
456-
getRegClassFromLeaf(const TreePatternNode &Leaf);
455+
const CodeGenRegisterClass *getRegClassFromLeaf(const TreePatternNode &Leaf);
457456

458457
/// Return a CodeGenRegisterClass for \p N if one can be found. Return
459-
/// std::nullopt otherwise.
460-
std::optional<const CodeGenRegisterClass *>
458+
/// nullptr otherwise.
459+
const CodeGenRegisterClass *
461460
inferRegClassFromPattern(const TreePatternNode &N);
462461

463462
Error constrainOperands(action_iterator InsertPt, RuleMatcher &M,
@@ -1733,12 +1732,13 @@ Error GlobalISelEmitter::constrainOperands(action_iterator InsertPt,
17331732
M.insertAction<ConstrainOperandToRegClassAction>(
17341733
InsertPt, InsnID, 0, Target.getRegisterClass(DstIOpRec));
17351734
} else if (DstIName == "EXTRACT_SUBREG") {
1736-
auto SuperClass = inferRegClassFromPattern(Dst.getChild(0));
1735+
const CodeGenRegisterClass *SuperClass =
1736+
inferRegClassFromPattern(Dst.getChild(0));
17371737
if (!SuperClass)
17381738
return failedImport(
17391739
"Cannot infer register class from EXTRACT_SUBREG operand #0");
17401740

1741-
auto SubIdx = inferSubRegIndexForNode(Dst.getChild(1));
1741+
const CodeGenSubRegIndex *SubIdx = inferSubRegIndexForNode(Dst.getChild(1));
17421742
if (!SubIdx)
17431743
return failedImport("EXTRACT_SUBREG child #1 is not a subreg index");
17441744

@@ -1749,7 +1749,7 @@ Error GlobalISelEmitter::constrainOperands(action_iterator InsertPt,
17491749
// FIXME: This may introduce an extra copy if the chosen class doesn't
17501750
// actually contain the subregisters.
17511751
const auto SrcRCDstRCPair =
1752-
(*SuperClass)->getMatchingSubClassWithSubRegs(CGRegs, *SubIdx);
1752+
SuperClass->getMatchingSubClassWithSubRegs(CGRegs, SubIdx);
17531753
if (!SrcRCDstRCPair) {
17541754
return failedImport("subreg index is incompatible "
17551755
"with inferred reg class");
@@ -1763,56 +1763,59 @@ Error GlobalISelEmitter::constrainOperands(action_iterator InsertPt,
17631763
} else if (DstIName == "INSERT_SUBREG") {
17641764
// We need to constrain the destination, a super regsister source, and a
17651765
// subregister source.
1766-
auto SubClass = inferRegClassFromPattern(Dst.getChild(1));
1766+
const CodeGenRegisterClass *SubClass =
1767+
inferRegClassFromPattern(Dst.getChild(1));
17671768
if (!SubClass)
17681769
return failedImport(
17691770
"Cannot infer register class from INSERT_SUBREG operand #1");
1770-
auto SuperClass = inferSuperRegisterClassForNode(
1771+
const CodeGenRegisterClass *SuperClass = inferSuperRegisterClassForNode(
17711772
Dst.getExtType(0), Dst.getChild(0), Dst.getChild(2));
17721773
if (!SuperClass)
17731774
return failedImport(
17741775
"Cannot infer register class for INSERT_SUBREG operand #0");
17751776
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, 0,
1776-
**SuperClass);
1777+
*SuperClass);
17771778
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, 1,
1778-
**SuperClass);
1779+
*SuperClass);
17791780
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, 2,
1780-
**SubClass);
1781+
*SubClass);
17811782
} else if (DstIName == "SUBREG_TO_REG") {
17821783
// We need to constrain the destination and subregister source.
17831784
// Attempt to infer the subregister source from the first child. If it has
17841785
// an explicitly given register class, we'll use that. Otherwise, we will
17851786
// fail.
1786-
auto SubClass = inferRegClassFromPattern(Dst.getChild(1));
1787+
const CodeGenRegisterClass *SubClass =
1788+
inferRegClassFromPattern(Dst.getChild(1));
17871789
if (!SubClass)
17881790
return failedImport(
17891791
"Cannot infer register class from SUBREG_TO_REG child #1");
17901792
// We don't have a child to look at that might have a super register node.
1791-
auto SuperClass =
1793+
const CodeGenRegisterClass *SuperClass =
17921794
inferSuperRegisterClass(Dst.getExtType(0), Dst.getChild(2));
17931795
if (!SuperClass)
17941796
return failedImport(
17951797
"Cannot infer register class for SUBREG_TO_REG operand #0");
17961798
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, 0,
1797-
**SuperClass);
1799+
*SuperClass);
17981800
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, 2,
1799-
**SubClass);
1801+
*SubClass);
18001802
} else if (DstIName == "REG_SEQUENCE") {
1801-
auto SuperClass = inferRegClassFromPattern(Dst.getChild(0));
1803+
const CodeGenRegisterClass *SuperClass =
1804+
inferRegClassFromPattern(Dst.getChild(0));
18021805

18031806
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, 0,
1804-
**SuperClass);
1807+
*SuperClass);
18051808

18061809
unsigned Num = Dst.getNumChildren();
18071810
for (unsigned I = 1; I != Num; I += 2) {
18081811
const TreePatternNode &SubRegChild = Dst.getChild(I + 1);
18091812

1810-
auto SubIdx = inferSubRegIndexForNode(SubRegChild);
1813+
const CodeGenSubRegIndex *SubIdx = inferSubRegIndexForNode(SubRegChild);
18111814
if (!SubIdx)
18121815
return failedImport("REG_SEQUENCE child is not a subreg index");
18131816

18141817
const auto SrcRCDstRCPair =
1815-
(*SuperClass)->getMatchingSubClassWithSubRegs(CGRegs, *SubIdx);
1818+
SuperClass->getMatchingSubClassWithSubRegs(CGRegs, SubIdx);
18161819

18171820
M.insertAction<ConstrainOperandToRegClassAction>(InsertPt, InsnID, I,
18181821
*SrcRCDstRCPair->second);
@@ -1824,19 +1827,16 @@ Error GlobalISelEmitter::constrainOperands(action_iterator InsertPt,
18241827
return Error::success();
18251828
}
18261829

1827-
std::optional<const CodeGenRegisterClass *>
1830+
const CodeGenRegisterClass *
18281831
GlobalISelEmitter::getRegClassFromLeaf(const TreePatternNode &Leaf) {
18291832
assert(Leaf.isLeaf() && "Expected leaf?");
18301833
const Record *RCRec = getInitValueAsRegClass(Leaf.getLeafValue());
18311834
if (!RCRec)
1832-
return std::nullopt;
1833-
const CodeGenRegisterClass *RC = CGRegs.getRegClass(RCRec);
1834-
if (!RC)
1835-
return std::nullopt;
1836-
return RC;
1835+
return nullptr;
1836+
return CGRegs.getRegClass(RCRec);
18371837
}
18381838

1839-
std::optional<const CodeGenRegisterClass *>
1839+
const CodeGenRegisterClass *
18401840
GlobalISelEmitter::inferRegClassFromPattern(const TreePatternNode &N) {
18411841
if (N.isLeaf())
18421842
return getRegClassFromLeaf(N);
@@ -1847,12 +1847,12 @@ GlobalISelEmitter::inferRegClassFromPattern(const TreePatternNode &N) {
18471847
// Only handle things that produce at least one value (if multiple values,
18481848
// just take the first one).
18491849
if (N.getNumTypes() < 1)
1850-
return std::nullopt;
1850+
return nullptr;
18511851
const Record *OpRec = N.getOperator();
18521852

18531853
// We only want instructions.
18541854
if (!OpRec->isSubClassOf("Instruction"))
1855-
return std::nullopt;
1855+
return nullptr;
18561856

18571857
// Don't want to try and infer things when there could potentially be more
18581858
// than one candidate register class.
@@ -1867,7 +1867,7 @@ GlobalISelEmitter::inferRegClassFromPattern(const TreePatternNode &N) {
18671867
// has the desired register class as the first child.
18681868
const TreePatternNode &RCChild = N.getChild(IsRegSequence ? 0 : 1);
18691869
if (!RCChild.isLeaf())
1870-
return std::nullopt;
1870+
return nullptr;
18711871
return getRegClassFromLeaf(RCChild);
18721872
}
18731873
if (InstName == "INSERT_SUBREG") {
@@ -1897,55 +1897,49 @@ GlobalISelEmitter::inferRegClassFromPattern(const TreePatternNode &N) {
18971897
return &RC;
18981898
}
18991899

1900-
return std::nullopt;
1900+
return nullptr;
19011901
}
19021902

1903-
std::optional<const CodeGenRegisterClass *>
1904-
GlobalISelEmitter::inferSuperRegisterClass(
1903+
const CodeGenRegisterClass *GlobalISelEmitter::inferSuperRegisterClass(
19051904
const TypeSetByHwMode &Ty, const TreePatternNode &SubRegIdxNode) {
19061905
// We need a ValueTypeByHwMode for getSuperRegForSubReg.
19071906
if (!Ty.isValueTypeByHwMode(false))
1908-
return std::nullopt;
1907+
return nullptr;
19091908
if (!SubRegIdxNode.isLeaf())
1910-
return std::nullopt;
1909+
return nullptr;
19111910
const DefInit *SubRegInit = dyn_cast<DefInit>(SubRegIdxNode.getLeafValue());
19121911
if (!SubRegInit)
1913-
return std::nullopt;
1912+
return nullptr;
19141913
const CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
19151914

19161915
// Use the information we found above to find a minimal register class which
19171916
// supports the subregister and type we want.
1918-
auto RC =
1919-
Target.getSuperRegForSubReg(Ty.getValueTypeByHwMode(), CGRegs, SubIdx,
1920-
/* MustBeAllocatable */ true);
1921-
if (!RC)
1922-
return std::nullopt;
1923-
return *RC;
1917+
return Target.getSuperRegForSubReg(Ty.getValueTypeByHwMode(), CGRegs, SubIdx,
1918+
/*MustBeAllocatable=*/true);
19241919
}
19251920

1926-
std::optional<const CodeGenRegisterClass *>
1927-
GlobalISelEmitter::inferSuperRegisterClassForNode(
1921+
const CodeGenRegisterClass *GlobalISelEmitter::inferSuperRegisterClassForNode(
19281922
const TypeSetByHwMode &Ty, const TreePatternNode &SuperRegNode,
19291923
const TreePatternNode &SubRegIdxNode) {
19301924
// Check if we already have a defined register class for the super register
19311925
// node. If we do, then we should preserve that rather than inferring anything
19321926
// from the subregister index node. We can assume that whoever wrote the
19331927
// pattern in the first place made sure that the super register and
19341928
// subregister are compatible.
1935-
if (std::optional<const CodeGenRegisterClass *> SuperRegisterClass =
1929+
if (const CodeGenRegisterClass *SuperRegisterClass =
19361930
inferRegClassFromPattern(SuperRegNode))
1937-
return *SuperRegisterClass;
1931+
return SuperRegisterClass;
19381932
return inferSuperRegisterClass(Ty, SubRegIdxNode);
19391933
}
19401934

1941-
std::optional<CodeGenSubRegIndex *> GlobalISelEmitter::inferSubRegIndexForNode(
1935+
const CodeGenSubRegIndex *GlobalISelEmitter::inferSubRegIndexForNode(
19421936
const TreePatternNode &SubRegIdxNode) {
19431937
if (!SubRegIdxNode.isLeaf())
1944-
return std::nullopt;
1938+
return nullptr;
19451939

19461940
const DefInit *SubRegInit = dyn_cast<DefInit>(SubRegIdxNode.getLeafValue());
19471941
if (!SubRegInit)
1948-
return std::nullopt;
1942+
return nullptr;
19491943
return CGRegs.getSubRegIdx(SubRegInit->getDef());
19501944
}
19511945

@@ -2095,30 +2089,32 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
20952089
if (MatchedRC.isNull())
20962090
return failedImport("REG_SEQUENCE operand #0 isn't a register class");
20972091
} else if (DstIName == "EXTRACT_SUBREG") {
2098-
auto InferredClass = inferRegClassFromPattern(Dst.getChild(0));
2092+
const CodeGenRegisterClass *InferredClass =
2093+
inferRegClassFromPattern(Dst.getChild(0));
20992094
if (!InferredClass)
21002095
return failedImport(
21012096
"Could not infer class for EXTRACT_SUBREG operand #0");
21022097

21032098
// We can assume that a subregister is in the same bank as it's super
21042099
// register.
2105-
MatchedRC = (*InferredClass)->getDef();
2100+
MatchedRC = InferredClass->getDef();
21062101
} else if (DstIName == "INSERT_SUBREG") {
2107-
auto MaybeSuperClass =
2102+
const CodeGenRegisterClass *MaybeSuperClass =
21082103
inferSuperRegisterClassForNode(VTy, Dst.getChild(0), Dst.getChild(2));
21092104
if (!MaybeSuperClass)
21102105
return failedImport(
21112106
"Cannot infer register class for INSERT_SUBREG operand #0");
21122107
// Move to the next pattern here, because the register class we found
21132108
// doesn't necessarily have a record associated with it. So, we can't
21142109
// set DstIOpRec using this.
2115-
MatchedRC = *MaybeSuperClass;
2110+
MatchedRC = MaybeSuperClass;
21162111
} else if (DstIName == "SUBREG_TO_REG") {
2117-
auto MaybeRegClass = inferSuperRegisterClass(VTy, Dst.getChild(2));
2112+
const CodeGenRegisterClass *MaybeRegClass =
2113+
inferSuperRegisterClass(VTy, Dst.getChild(2));
21182114
if (!MaybeRegClass)
21192115
return failedImport(
21202116
"Cannot infer register class for SUBREG_TO_REG operand #0");
2121-
MatchedRC = *MaybeRegClass;
2117+
MatchedRC = MaybeRegClass;
21222118
} else if (cast<const Record *>(MatchedRC)->isSubClassOf("RegisterOperand"))
21232119
MatchedRC = cast<const Record *>(MatchedRC)->getValueAsDef("RegClass");
21242120
else if (!cast<const Record *>(MatchedRC)->isSubClassOf("RegisterClass"))

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