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X86: Generate mir checks in sqrt test
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‎llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll

Lines changed: 43 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1,48 +1,56 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
12
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2,fma -stop-after=finalize-isel 2>&1 | FileCheck %s
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declare float @llvm.sqrt.f32(float) #0
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define float @foo(float %f) #0 {
6-
; CHECK: {{name: *foo}}
7-
; CHECK: body:
8-
; CHECK: %0:fr32 = COPY $xmm0
9-
; CHECK: %1:fr32 = VRSQRTSSr killed %2, %0
10-
; CHECK: %3:fr32 = nofpexcept VMULSSrr %0, %1
11-
; CHECK: %4:fr32 = VMOVSSrm
12-
; CHECK: %5:fr32 = nofpexcept VFMADD213SSr %1, killed %3, %4
13-
; CHECK: %6:fr32 = VMOVSSrm
14-
; CHECK: %7:fr32 = nofpexcept VMULSSrr %1, %6
15-
; CHECK: %8:fr32 = nofpexcept VMULSSrr killed %7, killed %5
16-
; CHECK: %9:fr32 = nofpexcept VMULSSrr %0, %8
17-
; CHECK: %10:fr32 = nofpexcept VFMADD213SSr %8, %9, %4
18-
; CHECK: %11:fr32 = nofpexcept VMULSSrr %9, %6
19-
; CHECK: %12:fr32 = nofpexcept VMULSSrr killed %11, killed %10
20-
; CHECK: %14:fr32 = FsFLD0SS
21-
; CHECK: %15:fr32 = nofpexcept VCMPSSrr %0, killed %14, 0
22-
; CHECK: %17:vr128 = VPANDNrr killed %16, killed %13
23-
; CHECK: $xmm0 = COPY %18
24-
; CHECK: RET 0, $xmm0
7+
; CHECK-LABEL: name: foo
8+
; CHECK: bb.0 (%ir-block.0):
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; CHECK: liveins: $xmm0
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; CHECK: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
11+
; CHECK: [[DEF:%[0-9]+]]:fr32 = IMPLICIT_DEF
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; CHECK: [[VRSQRTSSr:%[0-9]+]]:fr32 = VRSQRTSSr killed [[DEF]], [[COPY]]
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; CHECK: %3:fr32 = nofpexcept VMULSSrr [[COPY]], [[VRSQRTSSr]], implicit $mxcsr
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; CHECK: [[VMOVSSrm_alt:%[0-9]+]]:fr32 = VMOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load 4 from constant-pool)
15+
; CHECK: %5:fr32 = nofpexcept VFMADD213SSr [[VRSQRTSSr]], killed %3, [[VMOVSSrm_alt]], implicit $mxcsr
16+
; CHECK: [[VMOVSSrm_alt1:%[0-9]+]]:fr32 = VMOVSSrm_alt $rip, 1, $noreg, %const.1, $noreg :: (load 4 from constant-pool)
17+
; CHECK: %7:fr32 = nofpexcept VMULSSrr [[VRSQRTSSr]], [[VMOVSSrm_alt1]], implicit $mxcsr
18+
; CHECK: %8:fr32 = nofpexcept VMULSSrr killed %7, killed %5, implicit $mxcsr
19+
; CHECK: %9:fr32 = nofpexcept VMULSSrr [[COPY]], %8, implicit $mxcsr
20+
; CHECK: %10:fr32 = nofpexcept VFMADD213SSr %8, %9, [[VMOVSSrm_alt]], implicit $mxcsr
21+
; CHECK: %11:fr32 = nofpexcept VMULSSrr %9, [[VMOVSSrm_alt1]], implicit $mxcsr
22+
; CHECK: %12:fr32 = nofpexcept VMULSSrr killed %11, killed %10, implicit $mxcsr
23+
; CHECK: [[COPY1:%[0-9]+]]:vr128 = COPY %12
24+
; CHECK: [[FsFLD0SS:%[0-9]+]]:fr32 = FsFLD0SS
25+
; CHECK: %15:fr32 = nofpexcept VCMPSSrr [[COPY]], killed [[FsFLD0SS]], 0, implicit $mxcsr
26+
; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY %15
27+
; CHECK: [[VPANDNrr:%[0-9]+]]:vr128 = VPANDNrr killed [[COPY2]], killed [[COPY1]]
28+
; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[VPANDNrr]]
29+
; CHECK: $xmm0 = COPY [[COPY3]]
30+
; CHECK: RET 0, $xmm0
2531
%call = tail call float @llvm.sqrt.f32(float %f) #1
2632
ret float %call
2733
}
2834

2935
define float @rfoo(float %f) #0 {
30-
; CHECK: {{name: *rfoo}}
31-
; CHECK: body: |
32-
; CHECK: %0:fr32 = COPY $xmm0
33-
; CHECK: %1:fr32 = VRSQRTSSr killed %2, %0
34-
; CHECK: %3:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr %0, %1
35-
; CHECK: %4:fr32 = VMOVSSrm
36-
; CHECK: %5:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VFMADD213SSr %1, killed %3, %4
37-
; CHECK: %6:fr32 = VMOVSSrm
38-
; CHECK: %7:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr %1, %6
39-
; CHECK: %8:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr killed %7, killed %5
40-
; CHECK: %9:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr %0, %8
41-
; CHECK: %10:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VFMADD213SSr %8, killed %9, %4
42-
; CHECK: %11:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr %8, %6
43-
; CHECK: %12:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr killed %11, killed %10
44-
; CHECK: $xmm0 = COPY %12
45-
; CHECK: RET 0, $xmm0
36+
; CHECK-LABEL: name: rfoo
37+
; CHECK: bb.0 (%ir-block.0):
38+
; CHECK: liveins: $xmm0
39+
; CHECK: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
40+
; CHECK: [[DEF:%[0-9]+]]:fr32 = IMPLICIT_DEF
41+
; CHECK: [[VRSQRTSSr:%[0-9]+]]:fr32 = VRSQRTSSr killed [[DEF]], [[COPY]]
42+
; CHECK: %3:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr [[COPY]], [[VRSQRTSSr]], implicit $mxcsr
43+
; CHECK: [[VMOVSSrm_alt:%[0-9]+]]:fr32 = VMOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load 4 from constant-pool)
44+
; CHECK: %5:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VFMADD213SSr [[VRSQRTSSr]], killed %3, [[VMOVSSrm_alt]], implicit $mxcsr
45+
; CHECK: [[VMOVSSrm_alt1:%[0-9]+]]:fr32 = VMOVSSrm_alt $rip, 1, $noreg, %const.1, $noreg :: (load 4 from constant-pool)
46+
; CHECK: %7:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr [[VRSQRTSSr]], [[VMOVSSrm_alt1]], implicit $mxcsr
47+
; CHECK: %8:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr killed %7, killed %5, implicit $mxcsr
48+
; CHECK: %9:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr [[COPY]], %8, implicit $mxcsr
49+
; CHECK: %10:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VFMADD213SSr %8, killed %9, [[VMOVSSrm_alt]], implicit $mxcsr
50+
; CHECK: %11:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr %8, [[VMOVSSrm_alt1]], implicit $mxcsr
51+
; CHECK: %12:fr32 = nnan ninf nsz arcp contract afn reassoc nofpexcept VMULSSrr killed %11, killed %10, implicit $mxcsr
52+
; CHECK: $xmm0 = COPY %12
53+
; CHECK: RET 0, $xmm0
4654
%sqrt = tail call float @llvm.sqrt.f32(float %f)
4755
%div = fdiv fast float 1.0, %sqrt
4856
ret float %div

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