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[RISCV] Precommit test coverage for VLMAX encodable via vsetivli
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‎llvm/test/CodeGen/RISCV/rvv/load-add-store.ll

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@@ -355,3 +355,148 @@ define void @vadd_vint64m8(ptr %pc, ptr %pa, ptr %pb) nounwind {
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store <vscale x 8 x i64> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint8m1(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint8m1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl1r.v v8, (a1)
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; CHECK-NEXT: vl1r.v v9, (a2)
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; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: vs1r.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 8 x i8>, ptr %pa
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%vb = load <vscale x 8 x i8>, ptr %pb
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%vc = add <vscale x 8 x i8> %va, %vb
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store <vscale x 8 x i8> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint8m2(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint8m2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2r.v v8, (a1)
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; CHECK-NEXT: vl2r.v v10, (a2)
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; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v10
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; CHECK-NEXT: vs2r.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 16 x i8>, ptr %pa
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%vb = load <vscale x 16 x i8>, ptr %pb
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%vc = add <vscale x 16 x i8> %va, %vb
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store <vscale x 16 x i8> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint8mf2(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint8mf2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a3, zero, e8, mf2, ta, ma
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; CHECK-NEXT: vle8.v v8, (a1)
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; CHECK-NEXT: vle8.v v9, (a2)
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: vse8.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 4 x i8>, ptr %pa
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%vb = load <vscale x 4 x i8>, ptr %pb
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%vc = add <vscale x 4 x i8> %va, %vb
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store <vscale x 4 x i8> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint8mf4(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint8mf4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a3, zero, e8, mf4, ta, ma
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; CHECK-NEXT: vle8.v v8, (a1)
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; CHECK-NEXT: vle8.v v9, (a2)
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: vse8.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 2 x i8>, ptr %pa
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%vb = load <vscale x 2 x i8>, ptr %pb
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%vc = add <vscale x 2 x i8> %va, %vb
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store <vscale x 2 x i8> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint8mf8(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint8mf8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a3, zero, e8, mf8, ta, ma
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; CHECK-NEXT: vle8.v v8, (a1)
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; CHECK-NEXT: vle8.v v9, (a2)
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: vse8.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 1 x i8>, ptr %pa
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%vb = load <vscale x 1 x i8>, ptr %pb
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%vc = add <vscale x 1 x i8> %va, %vb
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store <vscale x 1 x i8> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint32m1(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint32m1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl1re32.v v8, (a1)
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; CHECK-NEXT: vl1re32.v v9, (a2)
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; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: vs1r.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 2 x i32>, ptr %pa
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%vb = load <vscale x 2 x i32>, ptr %pb
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%vc = add <vscale x 2 x i32> %va, %vb
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store <vscale x 2 x i32> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint32m2(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint32m2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2re32.v v8, (a1)
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; CHECK-NEXT: vl2re32.v v10, (a2)
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; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v10
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; CHECK-NEXT: vs2r.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 4 x i32>, ptr %pa
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%vb = load <vscale x 4 x i32>, ptr %pb
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%vc = add <vscale x 4 x i32> %va, %vb
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store <vscale x 4 x i32> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint32m4(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint32m4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl4re32.v v8, (a1)
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; CHECK-NEXT: vl4re32.v v12, (a2)
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; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v12
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; CHECK-NEXT: vs4r.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 8 x i32>, ptr %pa
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%vb = load <vscale x 8 x i32>, ptr %pb
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%vc = add <vscale x 8 x i32> %va, %vb
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store <vscale x 8 x i32> %vc, ptr %pc
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ret void
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}
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define void @exact_vlen_vadd_vint32m8(ptr %pc, ptr %pa, ptr %pb) nounwind vscale_range(2,2) {
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; CHECK-LABEL: exact_vlen_vadd_vint32m8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl8re32.v v8, (a1)
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; CHECK-NEXT: vl8re32.v v16, (a2)
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; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v16
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; CHECK-NEXT: vs8r.v v8, (a0)
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; CHECK-NEXT: ret
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%va = load <vscale x 16 x i32>, ptr %pa
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%vb = load <vscale x 16 x i32>, ptr %pb
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%vc = add <vscale x 16 x i32> %va, %vb
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store <vscale x 16 x i32> %vc, ptr %pc
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ret void
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}

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