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Commit 7559062

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fix clang format
1 parent b12fb8e commit 7559062

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2 files changed

+3
-3
lines changed

2 files changed

+3
-3
lines changed

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12111,7 +12111,8 @@ SDValue PPCTargetLowering::LowerSSUBO(SDValue Op, SelectionDAG &DAG) const {
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///
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SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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switch (Op.getOpcode()) {
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default: llvm_unreachable("Wasn't expecting to be able to lower this!");
12114+
default:
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llvm_unreachable("Wasn't expecting to be able to lower this!");
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case ISD::FPOW: return lowerPow(Op, DAG);
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case ISD::FSIN: return lowerSin(Op, DAG);
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case ISD::FCOS: return lowerCos(Op, DAG);

llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -628,8 +628,7 @@ bool PPCRegisterInfo::getRegAllocationHints(Register VirtReg,
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const TargetRegisterClass *
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PPCRegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
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if (RC == &PPC::CARRYRCRegClass)
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return TM.isPPC64() ? &PPC::G8RCRegClass: &PPC::GPRCRegClass;
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631+
return TM.isPPC64() ? &PPC::G8RCRegClass : &PPC::GPRCRegClass;
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return RC;
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}
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