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ValueTracking: simplify udiv/urem recurrences
udiv and urem recurrences have the property that the result can never exceed the start value. Implement a simplification based on this property.
1 parent d4b07c9 commit 756b8f9

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2 files changed

+21
-13
lines changed

2 files changed

+21
-13
lines changed

llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1543,6 +1543,21 @@ static void computeKnownBitsFromOperator(const Operator *I,
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}
15441544
break;
15451545
}
1546+
1547+
// Check for operations with the propperty that the magnitude of the
1548+
// result will never exceed that of the start value.
1549+
case Instruction::UDiv:
1550+
case Instruction::URem: {
1551+
SimplifyQuery RecQ = Q.getWithoutCondContext();
1552+
1553+
unsigned OpNum = P->getOperand(0) == R ? 0 : 1;
1554+
Instruction *RInst = P->getIncomingBlock(OpNum)->getTerminator();
1555+
1556+
RecQ.CxtI = RInst;
1557+
computeKnownBits(R, DemandedElts, Known2, Depth + 1, RecQ);
1558+
Known.Zero.setHighBits(Known2.countMinLeadingZeros());
1559+
break;
1560+
}
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default:
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break;
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}
@@ -8997,12 +9012,14 @@ bool llvm::matchSimpleRecurrence(const PHINode *P, BinaryOperator *&BO,
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switch (Opcode) {
89989013
default:
89999014
continue;
9000-
// TODO: Expand list -- xor, div, gep, uaddo, etc..
9015+
// TODO: Expand list -- sdiv, srem, fadd etc.
90019016
case Instruction::LShr:
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case Instruction::AShr:
90039018
case Instruction::Shl:
90049019
case Instruction::Add:
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case Instruction::Sub:
9021+
case Instruction::UDiv:
9022+
case Instruction::URem:
90069023
case Instruction::And:
90079024
case Instruction::Or:
90089025
case Instruction::Mul:

llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -86,12 +86,9 @@ define i64 @test_udiv(i1 %c) {
8686
; CHECK-NEXT: entry:
8787
; CHECK-NEXT: br label [[LOOP:%.*]]
8888
; CHECK: loop:
89-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 9, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
90-
; CHECK-NEXT: [[IV_NEXT]] = udiv i64 [[IV]], 3
9189
; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]]
9290
; CHECK: exit:
93-
; CHECK-NEXT: [[RES:%.*]] = and i64 [[IV]], 16
94-
; CHECK-NEXT: ret i64 [[RES]]
91+
; CHECK-NEXT: ret i64 0
9592
;
9693
entry:
9794
br label %loop
@@ -109,12 +106,9 @@ define i64 @test_udiv2(i1 %c) {
109106
; CHECK-NEXT: entry:
110107
; CHECK-NEXT: br label [[LOOP:%.*]]
111108
; CHECK: loop:
112-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 3, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
113-
; CHECK-NEXT: [[IV_NEXT]] = udiv i64 9, [[IV]]
114109
; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]]
115110
; CHECK: exit:
116-
; CHECK-NEXT: [[RES:%.*]] = and i64 [[IV]], 4
117-
; CHECK-NEXT: ret i64 [[RES]]
111+
; CHECK-NEXT: ret i64 0
118112
;
119113
entry:
120114
br label %loop
@@ -132,12 +126,9 @@ define i64 @test_urem(i1 %c) {
132126
; CHECK-NEXT: entry:
133127
; CHECK-NEXT: br label [[LOOP:%.*]]
134128
; CHECK: loop:
135-
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 3, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
136-
; CHECK-NEXT: [[IV_NEXT]] = urem i64 9, [[IV]]
137129
; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]]
138130
; CHECK: exit:
139-
; CHECK-NEXT: [[RES:%.*]] = and i64 [[IV]], 4
140-
; CHECK-NEXT: ret i64 [[RES]]
131+
; CHECK-NEXT: ret i64 0
141132
;
142133
entry:
143134
br label %loop

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