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Update command line option
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llvm/lib/Target/RISCV/RISCVTargetMachine.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -97,8 +97,8 @@ static cl::opt<bool> EnableMISchedLoadClustering(
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cl::init(false));
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static cl::opt<bool> EnableVSETVLIAfterRVVRegAlloc(
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"riscv-vsetvli-after-rvv-regalloc", cl::Hidden,
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cl::desc("vsetvl insertion after rvv regalloc"), cl::init(true));
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"riscv-vsetvl-after-rvv-regalloc", cl::Hidden,
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cl::desc("Insert vsetvls after vector register allocation"), cl::init(true));
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
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RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());

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