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[RISCV] Enable encodng conflict framework for RISCV target.
This PR is a follow-up of PR #96174 which added the frameowrk to resolve encoding conflicts. This PR explicitly enables this only for RISCV target.
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3 files changed

+21
-11
lines changed

3 files changed

+21
-11
lines changed

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Lines changed: 12 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1860,11 +1860,18 @@ ParseStatus RISCVAsmParser::parseCSRSystemRegister(OperandVector &Operands) {
18601860
if (CE) {
18611861
int64_t Imm = CE->getValue();
18621862
if (isUInt<12>(Imm)) {
1863-
auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm);
1864-
// Accept an immediate representing a named or un-named Sys Reg
1865-
// if the range is valid, regardless of the required features.
1866-
Operands.push_back(
1867-
RISCVOperand::createSysReg(SysReg ? SysReg->Name : "", S, Imm));
1863+
auto Range = RISCVSysReg::lookupSysRegByEncoding(Imm);
1864+
// Accept an immediate representing a named Sys Reg if it satisfies the
1865+
// the requried features.
1866+
for (auto It : Range) {
1867+
if (It.haveRequiredFeatures(STI->getFeatureBits())) {
1868+
Operands.push_back(RISCVOperand::createSysReg(It.Name, S, Imm));
1869+
return ParseStatus::Success;
1870+
}
1871+
}
1872+
// Accept an immediate representing an un-named Sys Reg if the range is
1873+
// valid, regardless of the required features.
1874+
Operands.push_back(RISCVOperand::createSysReg("", S, Imm));
18681875
return ParseStatus::Success;
18691876
}
18701877
}

llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -121,11 +121,14 @@ void RISCVInstPrinter::printCSRSystemRegister(const MCInst *MI, unsigned OpNo,
121121
const MCSubtargetInfo &STI,
122122
raw_ostream &O) {
123123
unsigned Imm = MI->getOperand(OpNo).getImm();
124-
auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm);
125-
if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits()))
126-
markup(O, Markup::Register) << SysReg->Name;
127-
else
128-
markup(O, Markup::Register) << formatImm(Imm);
124+
auto Range = RISCVSysReg::lookupSysRegByEncoding(Imm);
125+
for(auto It : Range){
126+
if (It.haveRequiredFeatures(STI.getFeatureBits())) {
127+
markup(O, Markup::Register) << It.Name;
128+
return;
129+
}
130+
}
131+
markup(O, Markup::Register) << formatImm(Imm);
129132
}
130133

131134
void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,

llvm/lib/Target/RISCV/RISCVSystemOperands.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ def SysRegsList : GenericTable {
4949

5050
let PrimaryKey = [ "Encoding" ];
5151
let PrimaryKeyName = "lookupSysRegByEncoding";
52-
let PrimaryKeyReturnRange = false;
52+
let PrimaryKeyReturnRange = true;
5353
}
5454

5555
def lookupSysRegByName : SearchIndex {

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