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[CodeGen] Port MachineUniformityAnalysis to new pass manager
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‎llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h

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@@ -17,6 +17,7 @@
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#include "llvm/ADT/GenericUniformityInfo.h"
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#include "llvm/CodeGen/MachineCycleAnalysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachinePassManager.h"
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#include "llvm/CodeGen/MachineSSAContext.h"
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namespace llvm {
@@ -51,6 +52,27 @@ class MachineUniformityAnalysisPass : public MachineFunctionPass {
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// TODO: verify analysis
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};
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class MachineUniformityAnalysis
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: public AnalysisInfoMixin<MachineUniformityAnalysis> {
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friend AnalysisInfoMixin<MachineUniformityAnalysis>;
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static AnalysisKey Key;
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public:
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using Result = MachineUniformityInfo;
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Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
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};
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class MachineUniformityPrinterPass
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: public PassInfoMixin<MachineUniformityAnalysis> {
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raw_ostream &OS;
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public:
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explicit MachineUniformityPrinterPass(raw_ostream &OS) : OS(OS) {}
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PreservedAnalyses run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM);
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static bool isRequired() { return true; }
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};
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} // namespace llvm
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#endif // LLVM_CODEGEN_MACHINEUNIFORMITYANALYSIS_H

‎llvm/include/llvm/Passes/MachinePassRegistry.def

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@@ -114,6 +114,7 @@ MACHINE_FUNCTION_ANALYSIS("machine-opt-remark-emitter",
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MACHINE_FUNCTION_ANALYSIS("machine-post-dom-tree",
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MachinePostDominatorTreeAnalysis())
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MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics", MachineTraceMetricsAnalysis())
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MACHINE_FUNCTION_ANALYSIS("machine-uniformity", MachineUniformityAnalysis())
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MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis(PIC))
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MACHINE_FUNCTION_ANALYSIS("regalloc-evict", RegAllocEvictionAdvisorAnalysis())
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MACHINE_FUNCTION_ANALYSIS("regalloc-priority", RegAllocPriorityAdvisorAnalysis())
@@ -178,6 +179,8 @@ MACHINE_FUNCTION_PASS("print<machine-dom-tree>",
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MACHINE_FUNCTION_PASS("print<machine-loops>", MachineLoopPrinterPass(errs()))
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MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
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MachinePostDominatorTreePrinterPass(errs()))
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MACHINE_FUNCTION_PASS("print<machine-uniformity>",
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MachineUniformityPrinterPass(errs()))
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MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
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MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
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MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
@@ -302,11 +305,9 @@ DUMMY_MACHINE_FUNCTION_PASS("lrshrink", LiveRangeShrinkPass)
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DUMMY_MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass)
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DUMMY_MACHINE_FUNCTION_PASS("static-data-splitter", StaticDataSplitter)
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DUMMY_MACHINE_FUNCTION_PASS("machine-function-splitter", MachineFunctionSplitterPass)
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DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
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DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
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DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
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DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
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DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
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DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
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DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
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DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)

‎llvm/lib/CodeGen/MachineUniformityAnalysis.cpp

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#include "llvm/CodeGen/MachineUniformityAnalysis.h"
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#include "llvm/ADT/GenericUniformityImpl.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/MachineCycleAnalysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -177,6 +178,30 @@ class MachineUniformityInfoPrinterPass : public MachineFunctionPass {
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} // namespace
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AnalysisKey MachineUniformityAnalysis::Key;
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MachineUniformityAnalysis::Result
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MachineUniformityAnalysis::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM) {
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auto &DomTree = MFAM.getResult<MachineDominatorTreeAnalysis>(MF);
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auto &CI = MFAM.getResult<MachineCycleAnalysis>(MF);
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auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
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.getManager();
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auto &F = MF.getFunction();
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auto &TTI = FAM.getResult<TargetIRAnalysis>(F);
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return computeMachineUniformityInfo(MF, CI, DomTree,
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TTI.hasBranchDivergence(&F));
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}
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PreservedAnalyses
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MachineUniformityPrinterPass::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM) {
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auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
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OS << "MachineUniformityInfo for function: " << MF.getName() << '\n';
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MUI.print(OS);
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return PreservedAnalyses::all();
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}
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char MachineUniformityAnalysisPass::ID = 0;
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MachineUniformityAnalysisPass::MachineUniformityAnalysisPass()

‎llvm/lib/Passes/PassBuilder.cpp

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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/CodeGen/MachineSink.h"
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#include "llvm/CodeGen/MachineTraceMetrics.h"
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#include "llvm/CodeGen/MachineUniformityAnalysis.h"
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#include "llvm/CodeGen/MachineVerifier.h"
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#include "llvm/CodeGen/OptimizePHIs.h"
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#include "llvm/CodeGen/PHIElimination.h"

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir

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# NOTE: This file is Generic MIR translation of test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll test file
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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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name: readfirstlane
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body: |

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir

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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# readlane, readfirstlane is always uniform
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‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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name: test1

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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name: test1

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir

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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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name: f1

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
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# CHECK-LABEL: BLOCK bb.0
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# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# CHECK-LABEL: MachineUniformityInfo for function: hidden_loop_diverge
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# CHECK-LABEL: BLOCK bb.0

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# CHECK-LABEL: MachineUniformityInfo for function: basic
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# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# CHECK-LABEL: MachineUniformityInfo for function: divergent_cycle_1
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# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
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# CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# CHECK-LABEL: MachineUniformityInfo for function: basic
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# CHECK-NOT: CYCLES ASSSUMED DIVERGENT:
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# CHECK: CYCLES WITH DIVERGENT EXIT:

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# bb0(div)
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# / \

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# CHECK-LABEL: MachineUniformityInfo for function: test
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# CHECK-LABEL: BLOCK bb.0

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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name: loads

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir

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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# loads from flat non uniform
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---
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name: flatloads

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir

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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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---
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name: f1
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tracksRegLiveness: true

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# This test was generated using SelectionDAG, where the compilation flow does
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# not match the assumptions made in MachineUA. For now, this test mostly serves

‎llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir

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# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
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# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
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# This test was generated using SelectionDAG, where the compilation flow does
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# not match the assumptions made in MachineUA. For now, this test mostly serves

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