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[Clang][RISCV] Define RISC-V V builtin types
Add the types for the RISC-V V extension builtins. These types will be used by the RISC-V V intrinsics which require types of the form <vscale x 1 x i64>(LMUL=1 element size=64) or <vscale x 4 x i32>(LMUL=2 element size=32), etc. The vector_size attribute does not work for us as it doesn't create a scalable vector type. We want these types to be opaque and have no operators defined for them. We want them to be sizeless. This makes them similar to the ARM SVE builtin types. But we will have quite a bit more types. This patch adds around 60. Later patches will add another 230 or so types representing tuples of these types similar to the x2/x3/x4 types in ARM SVE. But with extra complexity that these types are combined with the LMUL concept that is unique to RISCV. For more background see this RFC http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html Authored-by: Roger Ferrer Ibanez <[email protected]> Co-Authored-by: Hsiangkai Wang <[email protected]> Differential Revision: https://reviews.llvm.org/D92715
1 parent 75997e8 commit 766ee10

29 files changed

+506
-9
lines changed

clang/include/clang/AST/ASTContext.h

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@@ -1020,6 +1020,9 @@ class ASTContext : public RefCountedBase<ASTContext> {
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#define PPC_VECTOR_TYPE(Name, Id, Size) \
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CanQualType Id##Ty;
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#include "clang/Basic/PPCTypes.def"
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#define RVV_TYPE(Name, Id, SingletonId) \
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CanQualType SingletonId;
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#include "clang/Basic/RISCVVTypes.def"
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// Types for deductions in C++0x [stmt.ranged]'s desugaring. Built on demand.
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mutable QualType AutoDeductTy; // Deduction against 'auto'.

clang/include/clang/AST/Type.h

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@@ -2492,6 +2492,9 @@ class BuiltinType : public Type {
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// PPC MMA Types
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#define PPC_VECTOR_TYPE(Name, Id, Size) Id,
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#include "clang/Basic/PPCTypes.def"
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// RVV Types
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#define RVV_TYPE(Name, Id, SingletonId) Id,
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#include "clang/Basic/RISCVVTypes.def"
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// All other builtin types
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#define BUILTIN_TYPE(Id, SingletonId) Id,
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#define LAST_BUILTIN_TYPE(Id) LastKind = Id

clang/include/clang/AST/TypeProperties.td

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Original file line numberDiff line numberDiff line change
@@ -769,6 +769,10 @@ let Class = BuiltinType in {
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case BuiltinType::ID: return ctx.ID##Ty;
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#include "clang/Basic/PPCTypes.def"
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#define RVV_TYPE(NAME, ID, SINGLETON_ID) \
773+
case BuiltinType::ID: return ctx.SINGLETON_ID;
774+
#include "clang/Basic/RISCVVTypes.def"
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772776
#define BUILTIN_TYPE(ID, SINGLETON_ID) \
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case BuiltinType::ID: return ctx.SINGLETON_ID;
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#include "clang/AST/BuiltinTypes.def"
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@@ -0,0 +1,147 @@
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//===-- RISCVVTypes.def - Metadata for the RISC-V V types ------*- C++ -*--===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
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//===----------------------------------------------------------------------===//
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//
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// This file defines various RISC-V V builtin types. The macros are:
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//
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// - RVV_TYPE(Name, Id, SingletonId)
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// A builtin type that has not been covered by any other #define
13+
// Defining this macro covers all the builtins.
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//
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// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP)
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// A RISC-V V scalable vector.
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//
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// - RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)
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// An RISC-V V scalable mask.
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//
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// where:
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//
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// - Name is the name of the builtin type.
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//
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// - Id is the enumerator defining the type.
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//
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// - SingletonId is the global singleton of this type.
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//
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// - NumEls enumerates the number of the elements.
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//
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// - ElBits is the size of one element in bits (SEW).
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//
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// - NF is the number of fields (NFIELDS) used in the Zvlsseg instructions
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// (TODO).
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//
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// - IsSigned is true for vectors of signed integer elements and
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// for vectors of floating-point elements.
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//
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// - IsFP is true for vectors of floating-point elements.
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//
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//===----------------------------------------------------------------------===//
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#ifndef RVV_VECTOR_TYPE
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#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP)\
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RVV_TYPE(Name, Id, SingletonId)
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#endif
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#ifndef RVV_PREDICATE_TYPE
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#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)\
50+
RVV_TYPE(Name, Id, SingletonId)
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#endif
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#ifndef RVV_VECTOR_TYPE_INT
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#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned) \
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RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false)
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#endif
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#ifndef RVV_VECTOR_TYPE_FLOAT
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#define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \
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RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true)
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#endif
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//===- Vector types -------------------------------------------------------===//
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RVV_VECTOR_TYPE_INT("__rvv_int8mf8_t", RvvInt8mf8, RvvInt8mf8Ty, 1, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int8mf4_t", RvvInt8mf4, RvvInt8mf4Ty, 2, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int8mf2_t", RvvInt8mf2, RvvInt8mf2Ty, 4, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int8m1_t", RvvInt8m1, RvvInt8m1Ty, 8, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int8m2_t", RvvInt8m2, RvvInt8m2Ty, 16, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int8m4_t", RvvInt8m4, RvvInt8m4Ty, 32, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int8m8_t", RvvInt8m8, RvvInt8m8Ty, 64, 8, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_uint8mf8_t",RvvUint8mf8,RvvUint8mf8Ty,1, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint8mf4_t",RvvUint8mf4,RvvUint8mf4Ty,2, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint8mf2_t",RvvUint8mf2,RvvUint8mf2Ty,4, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint8m1_t", RvvUint8m1, RvvUint8m1Ty, 8, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint8m2_t", RvvUint8m2, RvvUint8m2Ty, 16, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint8m4_t", RvvUint8m4, RvvUint8m4Ty, 32, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint8m8_t", RvvUint8m8, RvvUint8m8Ty, 64, 8, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_int16mf4_t",RvvInt16mf4,RvvInt16mf4Ty,1, 16, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int16mf2_t",RvvInt16mf2,RvvInt16mf2Ty,2, 16, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int16m1_t", RvvInt16m1, RvvInt16m1Ty, 4, 16, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int16m2_t", RvvInt16m2, RvvInt16m2Ty, 8, 16, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int16m4_t", RvvInt16m4, RvvInt16m4Ty, 16, 16, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_int16m8_t", RvvInt16m8, RvvInt16m8Ty, 32, 16, 1, true)
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RVV_VECTOR_TYPE_INT("__rvv_uint16mf4_t",RvvUint16mf4,RvvUint16mf4Ty,1, 16, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint16mf2_t",RvvUint16mf2,RvvUint16mf2Ty,2, 16, 1, false)
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RVV_VECTOR_TYPE_INT("__rvv_uint16m1_t", RvvUint16m1, RvvUint16m1Ty, 4, 16, 1, false)
91+
RVV_VECTOR_TYPE_INT("__rvv_uint16m2_t", RvvUint16m2, RvvUint16m2Ty, 8, 16, 1, false)
92+
RVV_VECTOR_TYPE_INT("__rvv_uint16m4_t", RvvUint16m4, RvvUint16m4Ty, 16, 16, 1, false)
93+
RVV_VECTOR_TYPE_INT("__rvv_uint16m8_t", RvvUint16m8, RvvUint16m8Ty, 32, 16, 1, false)
94+
95+
RVV_VECTOR_TYPE_INT("__rvv_int32mf2_t",RvvInt32mf2,RvvInt32mf2Ty,1, 32, 1, true)
96+
RVV_VECTOR_TYPE_INT("__rvv_int32m1_t", RvvInt32m1, RvvInt32m1Ty, 2, 32, 1, true)
97+
RVV_VECTOR_TYPE_INT("__rvv_int32m2_t", RvvInt32m2, RvvInt32m2Ty, 4, 32, 1, true)
98+
RVV_VECTOR_TYPE_INT("__rvv_int32m4_t", RvvInt32m4, RvvInt32m4Ty, 8, 32, 1, true)
99+
RVV_VECTOR_TYPE_INT("__rvv_int32m8_t", RvvInt32m8, RvvInt32m8Ty, 16, 32, 1, true)
100+
101+
RVV_VECTOR_TYPE_INT("__rvv_uint32mf2_t",RvvUint32mf2,RvvUint32mf2Ty,1, 32, 1, false)
102+
RVV_VECTOR_TYPE_INT("__rvv_uint32m1_t", RvvUint32m1, RvvUint32m1Ty, 2, 32, 1, false)
103+
RVV_VECTOR_TYPE_INT("__rvv_uint32m2_t", RvvUint32m2, RvvUint32m2Ty, 4, 32, 1, false)
104+
RVV_VECTOR_TYPE_INT("__rvv_uint32m4_t", RvvUint32m4, RvvUint32m4Ty, 8, 32, 1, false)
105+
RVV_VECTOR_TYPE_INT("__rvv_uint32m8_t", RvvUint32m8, RvvUint32m8Ty, 16, 32, 1, false)
106+
107+
RVV_VECTOR_TYPE_INT("__rvv_int64m1_t", RvvInt64m1, RvvInt64m1Ty, 1, 64, 1, true)
108+
RVV_VECTOR_TYPE_INT("__rvv_int64m2_t", RvvInt64m2, RvvInt64m2Ty, 2, 64, 1, true)
109+
RVV_VECTOR_TYPE_INT("__rvv_int64m4_t", RvvInt64m4, RvvInt64m4Ty, 4, 64, 1, true)
110+
RVV_VECTOR_TYPE_INT("__rvv_int64m8_t", RvvInt64m8, RvvInt64m8Ty, 8, 64, 1, true)
111+
112+
RVV_VECTOR_TYPE_INT("__rvv_uint64m1_t",RvvUint64m1,RvvUint64m1Ty,1, 64, 1, false)
113+
RVV_VECTOR_TYPE_INT("__rvv_uint64m2_t",RvvUint64m2,RvvUint64m2Ty,2, 64, 1, false)
114+
RVV_VECTOR_TYPE_INT("__rvv_uint64m4_t",RvvUint64m4,RvvUint64m4Ty,4, 64, 1, false)
115+
RVV_VECTOR_TYPE_INT("__rvv_uint64m8_t",RvvUint64m8,RvvUint64m8Ty,8, 64, 1, false)
116+
117+
RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4_t",RvvFloat16mf4,RvvFloat16mf4Ty,1, 16, 1)
118+
RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2_t",RvvFloat16mf2,RvvFloat16mf2Ty,2, 16, 1)
119+
RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1_t", RvvFloat16m1, RvvFloat16m1Ty, 4, 16, 1)
120+
RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2_t", RvvFloat16m2, RvvFloat16m2Ty, 8, 16, 1)
121+
RVV_VECTOR_TYPE_FLOAT("__rvv_float16m4_t", RvvFloat16m4, RvvFloat16m4Ty, 16, 16, 1)
122+
RVV_VECTOR_TYPE_FLOAT("__rvv_float16m8_t", RvvFloat16m8, RvvFloat16m8Ty, 32, 16, 1)
123+
124+
RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2_t",RvvFloat32mf2,RvvFloat32mf2Ty,1, 32, 1)
125+
RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1_t", RvvFloat32m1, RvvFloat32m1Ty, 2, 32, 1)
126+
RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2_t", RvvFloat32m2, RvvFloat32m2Ty, 4, 32, 1)
127+
RVV_VECTOR_TYPE_FLOAT("__rvv_float32m4_t", RvvFloat32m4, RvvFloat32m4Ty, 8, 32, 1)
128+
RVV_VECTOR_TYPE_FLOAT("__rvv_float32m8_t", RvvFloat32m8, RvvFloat32m8Ty, 16, 32, 1)
129+
130+
RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1_t", RvvFloat64m1, RvvFloat64m1Ty, 1, 64, 1)
131+
RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2_t", RvvFloat64m2, RvvFloat64m2Ty, 2, 64, 1)
132+
RVV_VECTOR_TYPE_FLOAT("__rvv_float64m4_t", RvvFloat64m4, RvvFloat64m4Ty, 4, 64, 1)
133+
RVV_VECTOR_TYPE_FLOAT("__rvv_float64m8_t", RvvFloat64m8, RvvFloat64m8Ty, 8, 64, 1)
134+
135+
RVV_PREDICATE_TYPE("__rvv_bool1_t", RvvBool1, RvvBool1Ty, 64)
136+
RVV_PREDICATE_TYPE("__rvv_bool2_t", RvvBool2, RvvBool2Ty, 32)
137+
RVV_PREDICATE_TYPE("__rvv_bool4_t", RvvBool4, RvvBool4Ty, 16)
138+
RVV_PREDICATE_TYPE("__rvv_bool8_t", RvvBool8, RvvBool8Ty, 8)
139+
RVV_PREDICATE_TYPE("__rvv_bool16_t", RvvBool16, RvvBool16Ty, 4)
140+
RVV_PREDICATE_TYPE("__rvv_bool32_t", RvvBool32, RvvBool32Ty, 2)
141+
RVV_PREDICATE_TYPE("__rvv_bool64_t", RvvBool64, RvvBool64Ty, 1)
142+
143+
#undef RVV_VECTOR_TYPE_FLOAT
144+
#undef RVV_VECTOR_TYPE_INT
145+
#undef RVV_VECTOR_TYPE
146+
#undef RVV_PREDICATE_TYPE
147+
#undef RVV_TYPE

clang/include/clang/Basic/TargetInfo.h

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@@ -218,6 +218,8 @@ class TargetInfo : public virtual TransferrableTargetInfo,
218218

219219
unsigned HasAArch64SVETypes : 1;
220220

221+
unsigned HasRISCVVTypes : 1;
222+
221223
unsigned AllowAMDGPUUnsafeFPAtomics : 1;
222224

223225
unsigned ARMCDECoprocMask : 8;
@@ -859,6 +861,10 @@ class TargetInfo : public virtual TransferrableTargetInfo,
859861
/// available on this target.
860862
bool hasAArch64SVETypes() const { return HasAArch64SVETypes; }
861863

864+
/// Returns whether or not the RISC-V V built-in types are
865+
/// available on this target.
866+
bool hasRISCVVTypes() const { return HasRISCVVTypes; }
867+
862868
/// Returns whether or not the AMDGPU unsafe floating point atomics are
863869
/// allowed.
864870
bool allowAMDGPUUnsafeFPAtomics() const { return AllowAMDGPUUnsafeFPAtomics; }

clang/include/clang/Serialization/ASTBitCodes.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1083,14 +1083,17 @@ class TypeIdx {
10831083
// \brief PowerPC MMA types with auto numeration
10841084
#define PPC_VECTOR_TYPE(Name, Id, Size) PREDEF_TYPE_##Id##_ID,
10851085
#include "clang/Basic/PPCTypes.def"
1086+
// \brief RISC-V V types with auto numeration
1087+
#define RVV_TYPE(Name, Id, SingletonId) PREDEF_TYPE_##Id##_ID,
1088+
#include "clang/Basic/RISCVVTypes.def"
10861089
};
10871090

10881091
/// The number of predefined type IDs that are reserved for
10891092
/// the PREDEF_TYPE_* constants.
10901093
///
10911094
/// Type IDs for non-predefined types will start at
10921095
/// NUM_PREDEF_TYPE_IDs.
1093-
const unsigned NUM_PREDEF_TYPE_IDS = 200;
1096+
const unsigned NUM_PREDEF_TYPE_IDS = 300;
10941097

10951098
/// Record codes for each kind of type.
10961099
///

clang/include/clang/module.modulemap

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@@ -63,6 +63,7 @@ module Clang_Basic {
6363
textual header "Basic/OpenMPKinds.def"
6464
textual header "Basic/OperatorKinds.def"
6565
textual header "Basic/PPCTypes.def"
66+
textual header "Basic/RISCVVTypes.def"
6667
textual header "Basic/Sanitizers.def"
6768
textual header "Basic/TokenKinds.def"
6869
textual header "Basic/X86Target.def"

clang/lib/AST/ASTContext.cpp

Lines changed: 54 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1436,6 +1436,12 @@ void ASTContext::InitBuiltinTypes(const TargetInfo &Target,
14361436
#include "clang/Basic/PPCTypes.def"
14371437
}
14381438

1439+
if (Target.hasRISCVVTypes()) {
1440+
#define RVV_TYPE(Name, Id, SingletonId) \
1441+
InitBuiltinType(SingletonId, BuiltinType::Id);
1442+
#include "clang/Basic/RISCVVTypes.def"
1443+
}
1444+
14391445
// Builtin type for __objc_yes and __objc_no
14401446
ObjCBuiltinBoolTy = (Target.useSignedCharForObjCBool() ?
14411447
SignedCharTy : BoolTy);
@@ -2167,6 +2173,18 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const {
21672173
Align = Size; \
21682174
break;
21692175
#include "clang/Basic/PPCTypes.def"
2176+
#define RVV_VECTOR_TYPE(Name, Id, SingletonId, ElKind, ElBits, NF, IsSigned, \
2177+
IsFP) \
2178+
case BuiltinType::Id: \
2179+
Width = 0; \
2180+
Align = ElBits; \
2181+
break;
2182+
#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, ElKind) \
2183+
case BuiltinType::Id: \
2184+
Width = 0; \
2185+
Align = 8; \
2186+
break;
2187+
#include "clang/Basic/RISCVVTypes.def"
21702188
}
21712189
break;
21722190
case Type::ObjCObjectPointer:
@@ -3811,6 +3829,19 @@ ASTContext::getBuiltinVectorTypeInfo(const BuiltinType *Ty) const {
38113829
return SVE_ELTTY(BFloat16Ty, 8, 3);
38123830
case BuiltinType::SveBFloat16x4:
38133831
return SVE_ELTTY(BFloat16Ty, 8, 4);
3832+
#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, \
3833+
IsSigned) \
3834+
case BuiltinType::Id: \
3835+
return {getIntTypeForBitwidth(ElBits, IsSigned), \
3836+
llvm::ElementCount::getScalable(NumEls), NF};
3837+
#define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \
3838+
case BuiltinType::Id: \
3839+
return {ElBits == 16 ? HalfTy : (ElBits == 32 ? FloatTy : DoubleTy), \
3840+
llvm::ElementCount::getScalable(NumEls), NF};
3841+
#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls) \
3842+
case BuiltinType::Id: \
3843+
return {BoolTy, llvm::ElementCount::getScalable(NumEls), 1};
3844+
#include "clang/Basic/RISCVVTypes.def"
38143845
}
38153846
}
38163847

@@ -3837,6 +3868,20 @@ QualType ASTContext::getScalableVectorType(QualType EltTy,
38373868
if (EltTy->isBooleanType() && NumElts == NumEls) \
38383869
return SingletonId;
38393870
#include "clang/Basic/AArch64SVEACLETypes.def"
3871+
} else if (Target->hasRISCVVTypes()) {
3872+
uint64_t EltTySize = getTypeSize(EltTy);
3873+
#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, \
3874+
IsFP) \
3875+
if (!EltTy->isBooleanType() && \
3876+
((EltTy->hasIntegerRepresentation() && \
3877+
EltTy->hasSignedIntegerRepresentation() == IsSigned) || \
3878+
(EltTy->hasFloatingRepresentation() && IsFP)) && \
3879+
EltTySize == ElBits && NumElts == NumEls) \
3880+
return SingletonId;
3881+
#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls) \
3882+
if (EltTy->isBooleanType() && NumElts == NumEls) \
3883+
return SingletonId;
3884+
#include "clang/Basic/RISCVVTypes.def"
38403885
}
38413886
return QualType();
38423887
}
@@ -7212,13 +7257,15 @@ static char getObjCEncodingForPrimitiveType(const ASTContext *C,
72127257
#define SVE_TYPE(Name, Id, SingletonId) \
72137258
case BuiltinType::Id:
72147259
#include "clang/Basic/AArch64SVEACLETypes.def"
7215-
{
7216-
DiagnosticsEngine &Diags = C->getDiagnostics();
7217-
unsigned DiagID = Diags.getCustomDiagID(
7218-
DiagnosticsEngine::Error, "cannot yet @encode type %0");
7219-
Diags.Report(DiagID) << BT->getName(C->getPrintingPolicy());
7220-
return ' ';
7221-
}
7260+
#define RVV_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
7261+
#include "clang/Basic/RISCVVTypes.def"
7262+
{
7263+
DiagnosticsEngine &Diags = C->getDiagnostics();
7264+
unsigned DiagID = Diags.getCustomDiagID(DiagnosticsEngine::Error,
7265+
"cannot yet @encode type %0");
7266+
Diags.Report(DiagID) << BT->getName(C->getPrintingPolicy());
7267+
return ' ';
7268+
}
72227269

72237270
case BuiltinType::ObjCId:
72247271
case BuiltinType::ObjCClass:

clang/lib/AST/ASTImporter.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1037,6 +1037,10 @@ ExpectedType ASTNodeImporter::VisitBuiltinType(const BuiltinType *T) {
10371037
case BuiltinType::Id: \
10381038
return Importer.getToContext().Id##Ty;
10391039
#include "clang/Basic/PPCTypes.def"
1040+
#define RVV_TYPE(Name, Id, SingletonId) \
1041+
case BuiltinType::Id: \
1042+
return Importer.getToContext().SingletonId;
1043+
#include "clang/Basic/RISCVVTypes.def"
10401044
#define SHARED_SINGLETON_TYPE(Expansion)
10411045
#define BUILTIN_TYPE(Id, SingletonId) \
10421046
case BuiltinType::Id: return Importer.getToContext().SingletonId;

clang/lib/AST/ExprConstant.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10984,6 +10984,8 @@ EvaluateBuiltinClassifyType(QualType T, const LangOptions &LangOpts) {
1098410984
#define PPC_VECTOR_TYPE(Name, Id, Size) \
1098510985
case BuiltinType::Id:
1098610986
#include "clang/Basic/PPCTypes.def"
10987+
#define RVV_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
10988+
#include "clang/Basic/RISCVVTypes.def"
1098710989
return GCCTypeClass::None;
1098810990

1098910991
case BuiltinType::Dependent:

clang/lib/AST/ItaniumMangle.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2921,6 +2921,13 @@ void CXXNameMangler::mangleType(const BuiltinType *T) {
29212921
Out << 'u' << type_name.size() << type_name; \
29222922
break;
29232923
#include "clang/Basic/PPCTypes.def"
2924+
// TODO: Check the mangling scheme for RISC-V V.
2925+
#define RVV_TYPE(Name, Id, SingletonId) \
2926+
case BuiltinType::Id: \
2927+
type_name = Name; \
2928+
Out << 'u' << type_name.size() << type_name; \
2929+
break;
2930+
#include "clang/Basic/RISCVVTypes.def"
29242931
}
29252932
}
29262933

clang/lib/AST/MicrosoftMangle.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2439,6 +2439,8 @@ void MicrosoftCXXNameMangler::mangleType(const BuiltinType *T, Qualifiers,
24392439
#define PPC_VECTOR_TYPE(Name, Id, Size) \
24402440
case BuiltinType::Id:
24412441
#include "clang/Basic/PPCTypes.def"
2442+
#define RVV_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
2443+
#include "clang/Basic/RISCVVTypes.def"
24422444
case BuiltinType::ShortAccum:
24432445
case BuiltinType::Accum:
24442446
case BuiltinType::LongAccum:

clang/lib/AST/NSAPI.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -477,6 +477,8 @@ NSAPI::getNSNumberFactoryMethodKind(QualType T) const {
477477
#define PPC_VECTOR_TYPE(Name, Id, Size) \
478478
case BuiltinType::Id:
479479
#include "clang/Basic/PPCTypes.def"
480+
#define RVV_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
481+
#include "clang/Basic/RISCVVTypes.def"
480482
case BuiltinType::BoundMember:
481483
case BuiltinType::Dependent:
482484
case BuiltinType::Overload:

clang/lib/AST/PrintfFormatString.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -794,6 +794,8 @@ bool PrintfSpecifier::fixType(QualType QT, const LangOptions &LangOpt,
794794
#define PPC_VECTOR_TYPE(Name, Id, Size) \
795795
case BuiltinType::Id:
796796
#include "clang/Basic/PPCTypes.def"
797+
#define RVV_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
798+
#include "clang/Basic/RISCVVTypes.def"
797799
#define SIGNED_TYPE(Id, SingletonId)
798800
#define UNSIGNED_TYPE(Id, SingletonId)
799801
#define FLOATING_TYPE(Id, SingletonId)

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