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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 |
| 2 | +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s |
| 3 | + |
| 4 | +@a = dso_local local_unnamed_addr global i16 0, align 2 |
| 5 | +@c = internal unnamed_addr global i1 false, align 1 |
| 6 | +@b = dso_local local_unnamed_addr global i8 0, align 1 |
| 7 | +@d = dso_local local_unnamed_addr global i32 0, align 4 |
| 8 | +@e = dso_local local_unnamed_addr global i64 0, align 8 |
| 9 | + |
| 10 | +define i32 @PR65895() { |
| 11 | +; CHECK-LABEL: PR65895: |
| 12 | +; CHECK: # %bb.0: # %entry |
| 13 | +; CHECK-NEXT: movb $2, %al |
| 14 | +; CHECK-NEXT: subb c(%rip), %al |
| 15 | +; CHECK-NEXT: cmpw $0, a(%rip) |
| 16 | +; CHECK-NEXT: je .LBB0_3 |
| 17 | +; CHECK-NEXT: # %bb.1: # %for.body.lr.ph |
| 18 | +; CHECK-NEXT: movb %al, b(%rip) |
| 19 | +; CHECK-NEXT: .p2align 4, 0x90 |
| 20 | +; CHECK-NEXT: .LBB0_2: # %for.body |
| 21 | +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 |
| 22 | +; CHECK-NEXT: jmp .LBB0_2 |
| 23 | +; CHECK-NEXT: .LBB0_3: # %for.end |
| 24 | +; CHECK-NEXT: addb $-3, %al |
| 25 | +; CHECK-NEXT: movsbl %al, %eax |
| 26 | +; CHECK-NEXT: movl %eax, d(%rip) |
| 27 | +; CHECK-NEXT: leal 247(%rax,%rax,2), %eax |
| 28 | +; CHECK-NEXT: movb $1, c(%rip) |
| 29 | +; CHECK-NEXT: movsbq %al, %rax |
| 30 | +; CHECK-NEXT: movq %rax, e(%rip) |
| 31 | +; CHECK-NEXT: xorl %eax, %eax |
| 32 | +; CHECK-NEXT: retq |
| 33 | +entry: |
| 34 | + %.pr = load i16, ptr @a, align 2 |
| 35 | + %tobool.not = icmp eq i16 %.pr, 0 |
| 36 | + %.b = load i1, ptr @c, align 1 |
| 37 | + %0 = select i1 %.b, i8 1, i8 2 |
| 38 | + br i1 %tobool.not, label %for.end, label %for.body.lr.ph |
| 39 | + |
| 40 | +for.body.lr.ph: |
| 41 | + store i8 %0, ptr @b, align 1 |
| 42 | + br label %for.body |
| 43 | + |
| 44 | +for.body: |
| 45 | + br label %for.body |
| 46 | + |
| 47 | +for.end: |
| 48 | + %sub = add nsw i8 %0, -3 |
| 49 | + %conv2 = sext i8 %sub to i32 |
| 50 | + store i32 %conv2, ptr @d, align 4 |
| 51 | + %add = shl nsw i32 %conv2, 1 |
| 52 | + %sub7 = add nsw i32 %conv2, 247 |
| 53 | + %add8 = add nsw i32 %sub7, %add |
| 54 | + %conv9 = zext i32 %add8 to i64 |
| 55 | + store i1 true, ptr @c, align 1 |
| 56 | + %sext = shl i64 %conv9, 56 |
| 57 | + %conv11 = ashr exact i64 %sext, 56 |
| 58 | + store i64 %conv11, ptr @e, align 8 |
| 59 | + ret i32 0 |
| 60 | +} |
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