Skip to content

Commit 76d827e

Browse files
author
Yeting Kuo
committed
Add implies of Zicifss.
1 parent 4a73535 commit 76d827e

File tree

5 files changed

+31
-61
lines changed

5 files changed

+31
-61
lines changed

llvm/lib/Support/RISCVISAInfo.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1024,6 +1024,7 @@ static const char *ImpliedExtsZfinx[] = {"zicsr"};
10241024
static const char *ImpliedExtsZhinx[] = {"zhinxmin"};
10251025
static const char *ImpliedExtsZhinxmin[] = {"zfinx"};
10261026
static const char *ImpliedExtsZicntr[] = {"zicsr"};
1027+
static const char *ImpliedExtsZicfiss[] = {"zicsr", "zimop", "zcmop"};
10271028
static const char *ImpliedExtsZihpm[] = {"zicsr"};
10281029
static const char *ImpliedExtsZk[] = {"zkn", "zkt", "zkr"};
10291030
static const char *ImpliedExtsZkn[] = {"zbkb", "zbkc", "zbkx",
@@ -1096,6 +1097,7 @@ static constexpr ImpliedExtsEntry ImpliedExts[] = {
10961097
{{"zfinx"}, {ImpliedExtsZfinx}},
10971098
{{"zhinx"}, {ImpliedExtsZhinx}},
10981099
{{"zhinxmin"}, {ImpliedExtsZhinxmin}},
1100+
{{"zicfiss"}, {ImpliedExtsZicfiss}},
10991101
{{"zicntr"}, {ImpliedExtsZicntr}},
11001102
{{"zihpm"}, {ImpliedExtsZihpm}},
11011103
{{"zk"}, {ImpliedExtsZk}},

llvm/lib/Target/RISCV/RISCVFeatures.td

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -79,13 +79,6 @@ def HasStdExtZihintntl : Predicate<"Subtarget->hasStdExtZihintntl()">,
7979
AssemblerPredicate<(all_of FeatureStdExtZihintntl),
8080
"'Zihintntl' (Non-Temporal Locality Hints)">;
8181

82-
def FeatureStdExtZicfiss
83-
: SubtargetFeature<"experimental-zicfiss", "HasStdExtZicfiss", "true",
84-
"'Zicfiss' (Shadow stack)">;
85-
def HasStdExtZicfiss : Predicate<"Subtarget->hasStdExtZicfiss()">,
86-
AssemblerPredicate<(all_of FeatureStdExtZicfiss),
87-
"'Zicfiss' (Shadow stack)">;
88-
8982
def FeatureStdExtZifencei
9083
: SubtargetFeature<"zifencei", "HasStdExtZifencei", "true",
9184
"'Zifencei' (fence.i)">;
@@ -707,6 +700,14 @@ def HasStdExtZcmop : Predicate<"Subtarget->hasStdExtZcmop()">,
707700
AssemblerPredicate<(all_of FeatureStdExtZcmop),
708701
"'Zcmop' (Compressed May-Be-Operations)">;
709702

703+
def FeatureStdExtZicfiss
704+
: SubtargetFeature<"experimental-zicfiss", "HasStdExtZicfiss", "true",
705+
"'Zicfiss' (Shadow stack)",
706+
[FeatureStdExtZicsr, FeatureStdExtZimop, FeatureStdExtZcmop]>;
707+
def HasStdExtZicfiss : Predicate<"Subtarget->hasStdExtZicfiss()">,
708+
AssemblerPredicate<(all_of FeatureStdExtZicfiss),
709+
"'Zicfiss' (Shadow stack)">;
710+
710711
def FeatureStdExtSmaia
711712
: SubtargetFeature<"smaia", "HasStdExtSmaia", "true",
712713
"'Smaia' (Smaia encompasses all added CSRs and all "

llvm/test/MC/RISCV/attribute-arch.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -313,7 +313,7 @@
313313
# CHECK: attribute 5, "rv32i2p1_zicfilp0p4"
314314

315315
.attribute arch, "rv32i_zicfiss0p4"
316-
# CHECK: .attribute 5, "rv32i2p1_zicfiss0p4"
316+
# CHECK: .attribute 5, "rv32i2p1_zicfiss0p4_zicsr2p0_zimop0p1_zca1p0_zcmop0p2"
317317

318318
.attribute arch, "rv64i_xsfvfwmaccqqq"
319319
# CHECK: attribute 5, "rv64i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin0p8_zvl32b1p0_xsfvfwmaccqqq1p0"

llvm/test/MC/RISCV/compressed-zicfiss.s

Lines changed: 0 additions & 53 deletions
This file was deleted.

llvm/test/MC/RISCV/zicfiss-valid.s

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -100,3 +100,23 @@ ssamoswap.d.rl a4, ra, (s0)
100100
# CHECK-NO-EXT-RV64: error: instruction requires the following: 'Zicfiss' (Shadow stack)
101101
ssamoswap.d.aqrl a4, ra, (s0)
102102
.endif
103+
104+
# CHECK-ASM-AND-OBJ: c.sspush ra
105+
# CHECK-ASM: encoding: [0x81,0x60]
106+
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
107+
c.sspush x1
108+
109+
# CHECK-ASM-AND-OBJ: c.sspush ra
110+
# CHECK-ASM: encoding: [0x81,0x60]
111+
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
112+
c.sspush ra
113+
114+
# CHECK-ASM-AND-OBJ: c.sspopchk t0
115+
# CHECK-ASM: encoding: [0x81,0x62]
116+
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
117+
c.sspopchk x5
118+
119+
# CHECK-ASM-AND-OBJ: c.sspopchk t0
120+
# CHECK-ASM: encoding: [0x81,0x62]
121+
# CHECK-NO-EXT: error: instruction requires the following: 'Zicfiss' (Shadow stack)
122+
c.sspopchk t0

0 commit comments

Comments
 (0)