Skip to content

Commit 7727853

Browse files
kosarevkosarev
authored
[AMDGPU][AsmParser] Eliminate validateExeczVcczOperands(). (#102600)
Mention the names of unavailable registers in error messages to not make the diagnostics for execz/vccz less rich than it was. Clean up unnecessary name qualifications while there. Part of <#62629>.
1 parent c7107ca commit 7727853

18 files changed

+183
-200
lines changed

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 30 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -1777,7 +1777,6 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
17771777
const SMLoc &IDLoc);
17781778
bool validateTHAndScopeBits(const MCInst &Inst, const OperandVector &Operands,
17791779
const unsigned CPol);
1780-
bool validateExeczVcczOperands(const OperandVector &Operands);
17811780
bool validateTFE(const MCInst &Inst, const OperandVector &Operands);
17821781
std::optional<StringRef> validateLdsDirect(const MCInst &Inst);
17831782
unsigned getConstantBusLimit(unsigned Opcode) const;
@@ -3035,7 +3034,8 @@ bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
30353034
if (Reg == AMDGPU::SGPR_NULL) {
30363035
Error(Loc, "'null' operand is not supported on this GPU");
30373036
} else {
3038-
Error(Loc, "register not available on this GPU");
3037+
Error(Loc, Twine(AMDGPUInstPrinter::getRegisterName(Reg)) +
3038+
" register not available on this GPU");
30393039
}
30403040
return false;
30413041
}
@@ -5048,22 +5048,6 @@ bool AMDGPUAsmParser::validateTHAndScopeBits(const MCInst &Inst,
50485048
return true;
50495049
}
50505050

5051-
bool AMDGPUAsmParser::validateExeczVcczOperands(const OperandVector &Operands) {
5052-
if (!isGFX11Plus())
5053-
return true;
5054-
for (auto &Operand : Operands) {
5055-
if (!Operand->isReg())
5056-
continue;
5057-
unsigned Reg = Operand->getReg();
5058-
if (Reg == SRC_EXECZ || Reg == SRC_VCCZ) {
5059-
Error(getRegLoc(Reg, Operands),
5060-
"execz and vccz are not supported on this GPU");
5061-
return false;
5062-
}
5063-
}
5064-
return true;
5065-
}
5066-
50675051
bool AMDGPUAsmParser::validateTFE(const MCInst &Inst,
50685052
const OperandVector &Operands) {
50695053
const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
@@ -5199,9 +5183,6 @@ bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst,
51995183
if (!validateWaitCnt(Inst, Operands)) {
52005184
return false;
52015185
}
5202-
if (!validateExeczVcczOperands(Operands)) {
5203-
return false;
5204-
}
52055186
if (!validateTFE(Inst, Operands)) {
52065187
return false;
52075188
}
@@ -6243,39 +6224,41 @@ bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {
62436224

62446225
bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,
62456226
unsigned RegNo) {
6246-
6247-
if (MRI.regsOverlap(AMDGPU::TTMP12_TTMP13_TTMP14_TTMP15, RegNo))
6227+
if (MRI.regsOverlap(TTMP12_TTMP13_TTMP14_TTMP15, RegNo))
62486228
return isGFX9Plus();
62496229

62506230
// GFX10+ has 2 more SGPRs 104 and 105.
6251-
if (MRI.regsOverlap(AMDGPU::SGPR104_SGPR105, RegNo))
6231+
if (MRI.regsOverlap(SGPR104_SGPR105, RegNo))
62526232
return hasSGPR104_SGPR105();
62536233

62546234
switch (RegNo) {
6255-
case AMDGPU::SRC_SHARED_BASE_LO:
6256-
case AMDGPU::SRC_SHARED_BASE:
6257-
case AMDGPU::SRC_SHARED_LIMIT_LO:
6258-
case AMDGPU::SRC_SHARED_LIMIT:
6259-
case AMDGPU::SRC_PRIVATE_BASE_LO:
6260-
case AMDGPU::SRC_PRIVATE_BASE:
6261-
case AMDGPU::SRC_PRIVATE_LIMIT_LO:
6262-
case AMDGPU::SRC_PRIVATE_LIMIT:
6235+
case SRC_SHARED_BASE_LO:
6236+
case SRC_SHARED_BASE:
6237+
case SRC_SHARED_LIMIT_LO:
6238+
case SRC_SHARED_LIMIT:
6239+
case SRC_PRIVATE_BASE_LO:
6240+
case SRC_PRIVATE_BASE:
6241+
case SRC_PRIVATE_LIMIT_LO:
6242+
case SRC_PRIVATE_LIMIT:
62636243
return isGFX9Plus();
6264-
case AMDGPU::SRC_POPS_EXITING_WAVE_ID:
6244+
case SRC_POPS_EXITING_WAVE_ID:
62656245
return isGFX9Plus() && !isGFX11Plus();
6266-
case AMDGPU::TBA:
6267-
case AMDGPU::TBA_LO:
6268-
case AMDGPU::TBA_HI:
6269-
case AMDGPU::TMA:
6270-
case AMDGPU::TMA_LO:
6271-
case AMDGPU::TMA_HI:
6246+
case TBA:
6247+
case TBA_LO:
6248+
case TBA_HI:
6249+
case TMA:
6250+
case TMA_LO:
6251+
case TMA_HI:
62726252
return !isGFX9Plus();
6273-
case AMDGPU::XNACK_MASK:
6274-
case AMDGPU::XNACK_MASK_LO:
6275-
case AMDGPU::XNACK_MASK_HI:
6253+
case XNACK_MASK:
6254+
case XNACK_MASK_LO:
6255+
case XNACK_MASK_HI:
62766256
return (isVI() || isGFX9()) && getTargetStreamer().getTargetID()->isXnackSupported();
6277-
case AMDGPU::SGPR_NULL:
6257+
case SGPR_NULL:
62786258
return isGFX10Plus();
6259+
case SRC_EXECZ:
6260+
case SRC_VCCZ:
6261+
return !isGFX11Plus();
62796262
default:
62806263
break;
62816264
}
@@ -6288,9 +6271,9 @@ bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,
62886271
// On GFX10Plus flat scratch is not a valid register operand and can only be
62896272
// accessed with s_setreg/s_getreg.
62906273
switch (RegNo) {
6291-
case AMDGPU::FLAT_SCR:
6292-
case AMDGPU::FLAT_SCR_LO:
6293-
case AMDGPU::FLAT_SCR_HI:
6274+
case FLAT_SCR:
6275+
case FLAT_SCR_LO:
6276+
case FLAT_SCR_HI:
62946277
return false;
62956278
default:
62966279
return true;
@@ -6299,7 +6282,7 @@ bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,
62996282

63006283
// VI only has 102 SGPRs, so make sure we aren't trying to use the 2 more that
63016284
// SI/CI have.
6302-
if (MRI.regsOverlap(AMDGPU::SGPR102_SGPR103, RegNo))
6285+
if (MRI.regsOverlap(SGPR102_SGPR103, RegNo))
63036286
return hasSGPR102_SGPR103();
63046287

63056288
return true;

‎llvm/test/MC/AMDGPU/expressions.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -337,4 +337,4 @@ v_sin_f32 v0, -s1000
337337

338338
xnack_mask_lo=1
339339
v_sin_f32 v0, xnack_mask_lo
340-
// NOVI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
340+
// NOVI: :[[@LINE-1]]:{{[0-9]+}}: error: xnack_mask_lo register not available on this GPU

‎llvm/test/MC/AMDGPU/flat-scratch.s

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -5,32 +5,32 @@
55
// RUN: not llvm-mc -triple=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
66

77
s_mov_b64 flat_scratch, -1
8-
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
8+
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch register not available on this GPU
99
// CI: s_mov_b64 flat_scratch, -1 ; encoding: [0xc1,0x04,0xe8,0xbe]
1010
// VI: s_mov_b64 flat_scratch, -1 ; encoding: [0xc1,0x01,0xe6,0xbe]
1111

1212
s_mov_b32 flat_scratch_lo, -1
13-
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
13+
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch_lo register not available on this GPU
1414
// CI: s_mov_b32 flat_scratch_lo, -1 ; encoding: [0xc1,0x03,0xe8,0xbe]
1515
// VI: s_mov_b32 flat_scratch_lo, -1 ; encoding: [0xc1,0x00,0xe6,0xbe]
1616

1717
s_mov_b32 flat_scratch_hi, -1
18-
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
18+
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch_hi register not available on this GPU
1919
// CI: s_mov_b32 flat_scratch_hi, -1 ; encoding: [0xc1,0x03,0xe9,0xbe]
2020
// VI: s_mov_b32 flat_scratch_hi, -1 ; encoding: [0xc1,0x00,0xe7,0xbe]
2121

2222

2323
s_mov_b64 flat_scratch_lo, -1
24-
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
24+
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch_lo register not available on this GPU
2525
// NOCI: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
2626
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: invalid operand for instruction
2727

2828
s_mov_b64 flat_scratch_hi, -1
29-
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
29+
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch_hi register not available on this GPU
3030
// NOCI: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
3131
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: invalid operand for instruction
3232

3333
s_mov_b32 flat_scratch, -1
34-
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
34+
// NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch register not available on this GPU
3535
// NOCI: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
3636
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: invalid operand for instruction

‎llvm/test/MC/AMDGPU/gfx10_err_pos.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1124,12 +1124,12 @@ v_add_nc_i32 v256, v0, v1
11241124
// register not available on this GPU
11251125

11261126
s_and_b32 ttmp9, tma_hi, 0x0000ffff
1127-
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
1127+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: tma_hi register not available on this GPU
11281128
// CHECK-NEXT:{{^}}s_and_b32 ttmp9, tma_hi, 0x0000ffff
11291129
// CHECK-NEXT:{{^}} ^
11301130

11311131
s_mov_b32 flat_scratch, -1
1132-
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: register not available on this GPU
1132+
// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: flat_scratch register not available on this GPU
11331133
// CHECK-NEXT:{{^}}s_mov_b32 flat_scratch, -1
11341134
// CHECK-NEXT:{{^}} ^
11351135

‎llvm/test/MC/AMDGPU/gfx11_asm_operands.s

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -16,35 +16,35 @@ s_cbranch_execz 0x100
1616

1717
s_add_i32 s0, execz, s2
1818
// GFX10: encoding: [0xfc,0x02,0x00,0x81]
19-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
19+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
2020

2121
s_add_i32 s0, src_execz, s2
2222
// GFX10: encoding: [0xfc,0x02,0x00,0x81]
23-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
23+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
2424

2525
s_add_i32 s0, s1, execz
2626
// GFX10: encoding: [0x01,0xfc,0x00,0x81]
27-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
27+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
2828

2929
s_add_i32 s0, s1, src_execz
3030
// GFX10: encoding: [0x01,0xfc,0x00,0x81]
31-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
31+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
3232

3333
v_add_f64 v[0:1], execz, v[2:3]
3434
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0xfc,0x04,0x02,0x00]
35-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
35+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
3636

3737
v_add_f64 v[0:1], src_execz, v[2:3]
3838
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0xfc,0x04,0x02,0x00]
39-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
39+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
4040

4141
v_add_f64 v[0:1], v[1:2], execz
4242
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0x01,0xf9,0x01,0x00]
43-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
43+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
4444

4545
v_add_f64 v[0:1], v[1:2], src_execz
4646
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0x01,0xf9,0x01,0x00]
47-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
47+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_execz register not available on this GPU
4848

4949
//---------------------------------------------------------------------------//
5050
// VCCZ
@@ -56,35 +56,35 @@ s_cbranch_vccz 0x100
5656

5757
s_add_i32 s0, vccz, s2
5858
// GFX10: encoding: [0xfb,0x02,0x00,0x81]
59-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
59+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
6060

6161
s_add_i32 s0, src_vccz, s2
6262
// GFX10: encoding: [0xfb,0x02,0x00,0x81]
63-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
63+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
6464

6565
s_add_i32 s0, s1, vccz
6666
// GFX10: encoding: [0x01,0xfb,0x00,0x81]
67-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
67+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
6868

6969
s_add_i32 s0, s1, src_vccz
7070
// GFX10: encoding: [0x01,0xfb,0x00,0x81]
71-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
71+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
7272

7373
v_add_f64 v[0:1], vccz, v[2:3]
7474
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0xfb,0x04,0x02,0x00]
75-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
75+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
7676

7777
v_add_f64 v[0:1], src_vccz, v[2:3]
7878
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0xfb,0x04,0x02,0x00]
79-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
79+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
8080

8181
v_add_f64 v[0:1], v[1:2], vccz
8282
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0x01,0xf7,0x01,0x00]
83-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
83+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
8484

8585
v_add_f64 v[0:1], v[1:2], src_vccz
8686
// GFX10: encoding: [0x00,0x00,0x64,0xd5,0x01,0xf7,0x01,0x00]
87-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: execz and vccz are not supported on this GPU
87+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_vccz register not available on this GPU
8888

8989
//---------------------------------------------------------------------------//
9090
// LDS_DIRECT
@@ -112,32 +112,32 @@ v_mov_b32 v0, src_lds_direct
112112

113113
s_add_i32 s0, src_pops_exiting_wave_id, s1
114114
// GFX10: encoding: [0xef,0x01,0x00,0x81]
115-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
115+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
116116

117117
s_add_i32 s0, s1, src_pops_exiting_wave_id
118118
// GFX10: encoding: [0x01,0xef,0x00,0x81]
119-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
119+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
120120

121121
s_add_i32 s0, pops_exiting_wave_id, s1
122122
// GFX10: encoding: [0xef,0x01,0x00,0x81]
123-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
123+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
124124

125125
s_add_i32 s0, s1, pops_exiting_wave_id
126126
// GFX10: encoding: [0x01,0xef,0x00,0x81]
127-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
127+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
128128

129129
v_add_co_u32 v0, s0, pops_exiting_wave_id, v1
130130
// GFX10: encoding: [0x00,0x00,0x0f,0xd7,0xef,0x02,0x02,0x00]
131-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
131+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
132132

133133
v_add_co_u32 v0, s0, src_pops_exiting_wave_id, v1
134134
// GFX10: encoding: [0x00,0x00,0x0f,0xd7,0xef,0x02,0x02,0x00]
135-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
135+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
136136

137137
v_add_co_u32 v0, s0, v1, pops_exiting_wave_id
138138
// GFX10: encoding: [0x00,0x00,0x0f,0xd7,0x01,0xdf,0x01,0x00]
139-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
139+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU
140140

141141
v_add_co_u32 v0, s0, v1, src_pops_exiting_wave_id
142142
// GFX10: encoding: [0x00,0x00,0x0f,0xd7,0x01,0xdf,0x01,0x00]
143-
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: register not available on this GPU
143+
// GFX11-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: src_pops_exiting_wave_id register not available on this GPU

0 commit comments

Comments
 (0)