@@ -672,8 +672,8 @@ if.false:
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ret void
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}
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- define i32 @str_transcode0 (i1 %cond1 , ptr %p , i1 %cond2 ) {
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- ; CHECK-LABEL: @str_transcode0 (
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+ define i32 @succ_phi_has_3input (i1 %cond1 , ptr %p , i1 %cond2 ) {
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+ ; CHECK-LABEL: @succ_phi_has_3input (
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND1:%.*]], label [[BB3:%.*]], label [[BB1:%.*]]
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; CHECK: bb1:
@@ -728,6 +728,37 @@ if.true:
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ret i32 %res
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}
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+ define i32 @succ1to0_phi3 (ptr %p , ptr %p2 , i32 %x ) {
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+ ; CHECK-LABEL: @succ1to0_phi3(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[COND:%.*]] = icmp eq ptr [[P:%.*]], null
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+ ; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND]], true
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+ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i1 [[TMP0]] to <1 x i1>
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+ ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[X:%.*]] to <1 x i32>
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+ ; CHECK-NEXT: [[TMP3:%.*]] = call <1 x i32> @llvm.masked.load.v1i32.p0(ptr [[P]], i32 4, <1 x i1> [[TMP1]], <1 x i32> [[TMP2]])
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+ ; CHECK-NEXT: [[TMP4:%.*]] = bitcast <1 x i32> [[TMP3]] to i32
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+ ; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP4]] to <1 x i32>
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+ ; CHECK-NEXT: call void @llvm.masked.store.v1i32.p0(<1 x i32> [[TMP5]], ptr [[P2:%.*]], i32 4, <1 x i1> [[TMP1]])
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+ ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND]], i32 0, i32 [[TMP4]]
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+ ; CHECK-NEXT: [[RES:%.*]] = add i32 [[SPEC_SELECT]], [[TMP4]]
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+ ; CHECK-NEXT: ret i32 [[RES]]
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+ ;
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+ entry:
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+ %cond = icmp eq ptr %p , null
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+ br i1 %cond , label %if.true , label %if.false
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+
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+ if.false:
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+ %0 = load i32 , ptr %p
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+ store i32 %0 , ptr %p2
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+ br label %if.true
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+
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+ if.true:
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+ %res0 = phi i32 [ %0 , %if.false ], [ 0 , %entry ]
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+ %res1 = phi i32 [ %0 , %if.false ], [ %x , %entry ]
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+ %res = add i32 %res0 , %res1
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+ ret i32 %res
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+ }
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+
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declare i32 @read_memory_only () readonly nounwind willreturn speculatable
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!llvm.dbg.cu = !{!0 }
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