Fix tests

Author: RKSimon

llvm/test/CodeGen/X86/evex-to-vex-compress.mir

@@ -2304,10 +2304,10 @@ body: |
   VEXTRACTPSZmr                                $rdi, 1, $noreg, 0, $noreg, $xmm0, 1
   ; CHECK: $eax = VEXTRACTPSrr                 $xmm0, 1
   $eax = VEXTRACTPSZrr                         $xmm0, 1
-  ; CHECK: $xmm0 = VINSERTPSrm                 $xmm0, $rdi, 1, $noreg, 0, $noreg, 1
-  $xmm0 = VINSERTPSZrm                         $xmm0, $rdi, 1, $noreg, 0, $noreg, 1
-  ; CHECK: $xmm0 = VINSERTPSrr                 $xmm0, $xmm0, 1
-  $xmm0 = VINSERTPSZrr                         $xmm0, $xmm0, 1
+  ; CHECK: $xmm0 = VINSERTPSrmi                $xmm0, $rdi, 1, $noreg, 0, $noreg, 1
+  $xmm0 = VINSERTPSZrmi                        $xmm0, $rdi, 1, $noreg, 0, $noreg, 1
+  ; CHECK: $xmm0 = VINSERTPSrri                $xmm0, $xmm0, 1
+  $xmm0 = VINSERTPSZrri                        $xmm0, $xmm0, 1
   ; CHECK: $xmm0 = VROUNDSDmi                  $xmm0, $rip, 1, $noreg, 0, $noreg, 15, implicit $mxcsr
   $xmm0 = VRNDSCALESDZm                        $xmm0, $rip, 1, $noreg, 0, $noreg, 15, implicit $mxcsr
   ; CHECK: $xmm0 = VROUNDSDri                  $xmm0, $xmm1, 15, implicit $mxcsr
@@ -4072,10 +4072,10 @@ body: |
   VEXTRACTPSZmr                                $rdi, 1, $noreg, 0, $noreg, $xmm16, 1
   ; CHECK: $eax = VEXTRACTPSZrr                $xmm16, 1
   $eax = VEXTRACTPSZrr                         $xmm16, 1
-  ; CHECK: $xmm16 = VINSERTPSZrm               $xmm16, $rdi, 1, $noreg, 0, $noreg, 1
-  $xmm16 = VINSERTPSZrm                        $xmm16, $rdi, 1, $noreg, 0, $noreg, 1
-  ; CHECK: $xmm16 = VINSERTPSZrr               $xmm16, $xmm16, 1
-  $xmm16 = VINSERTPSZrr                        $xmm16, $xmm16, 1
+  ; CHECK: $xmm16 = VINSERTPSZrmi              $xmm16, $rdi, 1, $noreg, 0, $noreg, 1
+  $xmm16 = VINSERTPSZrmi                       $xmm16, $rdi, 1, $noreg, 0, $noreg, 1
+  ; CHECK: $xmm16 = VINSERTPSZrri              $xmm16, $xmm16, 1
+  $xmm16 = VINSERTPSZrri                       $xmm16, $xmm16, 1
   ; CHECK: $xmm16 = VRNDSCALEPDZ128rmi         $rip, 1, $noreg, 0, $noreg, 15, implicit $mxcsr
   $xmm16 = VRNDSCALEPDZ128rmi                  $rip, 1, $noreg, 0, $noreg, 15, implicit $mxcsr
   ; CHECK: $xmm16 = VRNDSCALEPDZ128rri         $xmm16, 15, implicit $mxcsr

llvm/utils/TableGen/X86ManualFoldTables.def

@@ -215,18 +215,18 @@ NOFOLD(UD1Wr)
 // Exclude these two b/c they would conflict with {MMX_MOVD64from64rr, MMX_MOVQ64mr} in unfolding table
 NOFOLD(MMX_MOVQ64rr)
 NOFOLD(MMX_MOVQ64rr_REV)
-// INSERTPSrm has no count_s while INSERTPSrr has count_s.
+// INSERTPSrmi has no count_s while INSERTPSrri has count_s.
 // count_s is to indicate which element in dst vector is inserted.
-// if count_s!=0, we can not fold INSERTPSrr into INSERTPSrm
+// if count_s!=0, we can not fold INSERTPSrri into INSERTPSrmi
 //
 // the following folding can happen when count_s==0
 // load xmm0, m32
-// insertpsrr xmm1, xmm0, imm
+// INSERTPSrri xmm1, xmm0, imm
 // =>
-// insertpsrm xmm1, m32, imm
-NOFOLD(INSERTPSrr)
-NOFOLD(VINSERTPSZrr)
-NOFOLD(VINSERTPSrr)
+// INSERTPSrmi xmm1, m32, imm
+NOFOLD(INSERTPSrri)
+NOFOLD(VINSERTPSZrri)
+NOFOLD(VINSERTPSrri)
 // Memory faults are suppressed for CFCMOV with memory operand.
 NOFOLD(CFCMOV16rr_REV)
 NOFOLD(CFCMOV32rr_REV)