Initial working version via umax + or reduction + select

Author: huntergr-arm

llvm/docs/LangRef.rst

@@ -20002,6 +20002,36 @@ the follow sequence of operations:
 
 The ``mask`` operand will apply to at least the gather and scatter operations.
 
+'``llvm.experimental.vector.masked.extract.last.active``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+This is an overloaded intrinsic.
+
+This intrinsic will extract the value from a single lane of a vector, based
+on a supplied mask vector.
+
+::
+
+    declare i32 @llvm.experimental.vector.masked.extract.last.active.v4i32(<4 x i32> %data, <4 x i1> %mask, i32 %passthru)
+    declare i16 @llvm.experimental.vector.masked.extract.last.active.nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask, i16 %passthru)
+
+Arguments:
+""""""""""
+
+The first argument is the data vector to extract a lane from. The second is a
+mask vector controlling the extraction. The third argument is a passthru
+value.
+
+The two input vectors must have the same number of elements, and the type of
+the passthru value must match that of the elements of the data vector.
+
+Semantics:
+""""""""""
+
+The '``llvm.experimental.vector.masked.extract.last.active``' intrinsic will
+find the index of the most significant active lane in the mask vector, and
+extract the element at that index in the corresponding data vector. If no mask
+lanes are active then the passthru value is returned instead.
 
 .. _int_vector_compress:
 

llvm/include/llvm/IR/Intrinsics.td

@@ -1920,6 +1920,12 @@ def int_experimental_vector_histogram_add : DefaultAttrsIntrinsic<[],
                                LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>], // Mask
                              [ IntrArgMemOnly ]>;
 
+// Extract based on mask bits
+def int_experimental_vector_masked_extract_last_active:
+    DefaultAttrsIntrinsic<[LLVMVectorElementType<0>],
+              [llvm_anyvector_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
+               LLVMVectorElementType<0>], [IntrNoMem]>;
+
 // Operators
 let IntrProperties = [IntrNoMem, IntrNoSync, IntrWillReturn] in {
   // Integer arithmetic

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -8207,6 +8207,29 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
     visitVectorHistogram(I, Intrinsic);
     return;
   }
+  case Intrinsic::experimental_vector_masked_extract_last_active: {
+    SDValue Data = getValue(I.getOperand(0));
+    SDValue Mask = getValue(I.getOperand(1));
+    SDValue PassThru = getValue(I.getOperand(2));
+
+    EVT DataVT = Data.getValueType();
+    EVT ScalarVT = PassThru.getValueType();
+    EVT BoolVT = Mask.getValueType().getScalarType();
+    EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
+    EVT IdxVecVT = DataVT.changeVectorElementType(IdxVT);
+
+    SDValue Zeroes = DAG.getConstant(0, sdl, IdxVecVT);
+    SDValue StepVec = DAG.getStepVector(sdl, IdxVecVT);
+    SDValue ActiveElts = DAG.getSelect(sdl, IdxVecVT, Mask, StepVec, Zeroes);
+    SDValue HighestIdx =
+        DAG.getNode(ISD::VECREDUCE_UMAX, sdl, IdxVT, ActiveElts);
+    SDValue Extract =
+        DAG.getNode(ISD::EXTRACT_VECTOR_ELT, sdl, ScalarVT, Data, HighestIdx);
+    SDValue AnyActive = DAG.getNode(ISD::VECREDUCE_OR, sdl, BoolVT, Mask);
+    SDValue Result = DAG.getSelect(sdl, ScalarVT, AnyActive, Extract, PassThru);
+    setValue(&I, Result);
+    return;
+  }
   }
 }