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[RISCV] Use llvm::bit_floor and std::clamp (NFC)
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2 files changed

+3
-4
lines changed

2 files changed

+3
-4
lines changed

llvm/lib/Target/RISCV/RISCVSubtarget.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -157,8 +157,7 @@ unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors() const {
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"Tried to get vector length without Zve or V extension support!");
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assert(RVVVectorLMULMax <= 8 && isPowerOf2_32(RVVVectorLMULMax) &&
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"V extension requires a LMUL to be at most 8 and a power of 2!");
160-
return PowerOf2Floor(
161-
std::max<unsigned>(std::min<unsigned>(RVVVectorLMULMax, 8), 1));
160+
return llvm::bit_floor(std::clamp<unsigned>(RVVVectorLMULMax, 1, 8));
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}
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bool RISCVSubtarget::useRVVForFixedLengthVectors() const {

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -222,8 +222,8 @@ std::optional<unsigned> RISCVTTIImpl::getVScaleForTuning() const {
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TypeSize
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RISCVTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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unsigned LMUL = PowerOf2Floor(
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std::max<unsigned>(std::min<unsigned>(RVVRegisterWidthLMUL, 8), 1));
225+
unsigned LMUL =
226+
llvm::bit_floor(std::clamp<unsigned>(RVVRegisterWidthLMUL, 1, 8));
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switch (K) {
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case TargetTransformInfo::RGK_Scalar:
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return TypeSize::getFixed(ST->getXLen());

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