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[X86] LowerShift - pull out repeated getVectorNumElements calls. NFC. (#120241)
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -30000,6 +30000,7 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3000030000
SDLoc dl(Op);
3000130001
SDValue R = Op.getOperand(0);
3000230002
SDValue Amt = Op.getOperand(1);
30003+
unsigned NumElts = VT.getVectorNumElements();
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unsigned EltSizeInBits = VT.getScalarSizeInBits();
3000430005
bool ConstantAmt = ISD::isBuildVectorOfConstantSDNodes(Amt.getNode());
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@@ -30069,7 +30070,6 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3006930070
if (ConstantAmt && (VT == MVT::v8i16 || VT == MVT::v4i32 ||
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(VT == MVT::v16i16 && Subtarget.hasInt256()))) {
3007130072
SDValue Amt1, Amt2;
30072-
unsigned NumElts = VT.getVectorNumElements();
3007330073
SmallVector<int, 8> ShuffleMask;
3007430074
for (unsigned i = 0; i != NumElts; ++i) {
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SDValue A = Amt->getOperand(i);
@@ -30116,7 +30116,6 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3011630116
VT == MVT::v8i16 || VT == MVT::v16i16 || VT == MVT::v32i16) &&
3011730117
!Subtarget.hasXOP()) {
3011830118
MVT NarrowScalarVT = VT.getScalarType();
30119-
int NumElts = VT.getVectorNumElements();
3012030119
// We can do this extra fast if each pair of narrow elements is shifted by
3012130120
// the same amount by doing this SWAR style: use a shift to move the valid
3012230121
// bits to the right position, mask out any bits which crossed from one
@@ -30377,7 +30376,6 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3037730376
if ((VT == MVT::v16i8 && Subtarget.hasSSSE3()) ||
3037830377
(VT == MVT::v32i8 && Subtarget.hasInt256()) ||
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(VT == MVT::v64i8 && Subtarget.hasBWI())) {
30380-
unsigned NumElts = VT.getVectorNumElements();
3038130379
unsigned NumLanes = VT.getSizeInBits() / 128u;
3038230380
unsigned NumEltsPerLane = NumElts / NumLanes;
3038330381
SmallVector<APInt, 16> LUT;
@@ -30417,7 +30415,7 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3041730415
assert((!Subtarget.hasBWI() || VT == MVT::v32i8 || VT == MVT::v16i8) &&
3041830416
"Unexpected vector type");
3041930417
MVT EvtSVT = Subtarget.hasBWI() ? MVT::i16 : MVT::i32;
30420-
MVT ExtVT = MVT::getVectorVT(EvtSVT, VT.getVectorNumElements());
30418+
MVT ExtVT = MVT::getVectorVT(EvtSVT, NumElts);
3042130419
unsigned ExtOpc = Opc == ISD::SRA ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
3042230420
R = DAG.getNode(ExtOpc, dl, ExtVT, R);
3042330421
Amt = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtVT, Amt);
@@ -30431,7 +30429,6 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3043130429
(VT == MVT::v16i8 || (VT == MVT::v32i8 && Subtarget.hasInt256()) ||
3043230430
(VT == MVT::v64i8 && Subtarget.hasBWI())) &&
3043330431
!Subtarget.hasXOP()) {
30434-
int NumElts = VT.getVectorNumElements();
3043530432
MVT VT16 = MVT::getVectorVT(MVT::i16, NumElts / 2);
3043630433
SDValue Cst8 = DAG.getTargetConstant(8, dl, MVT::i8);
3043730434

@@ -30477,14 +30474,14 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3047730474
if (VT == MVT::v16i8 ||
3047830475
(VT == MVT::v32i8 && Subtarget.hasInt256() && !Subtarget.hasXOP()) ||
3047930476
(VT == MVT::v64i8 && Subtarget.hasBWI())) {
30480-
MVT ExtVT = MVT::getVectorVT(MVT::i16, VT.getVectorNumElements() / 2);
30477+
MVT ExtVT = MVT::getVectorVT(MVT::i16, NumElts / 2);
3048130478

3048230479
auto SignBitSelect = [&](MVT SelVT, SDValue Sel, SDValue V0, SDValue V1) {
3048330480
if (VT.is512BitVector()) {
3048430481
// On AVX512BW targets we make use of the fact that VSELECT lowers
3048530482
// to a masked blend which selects bytes based just on the sign bit
3048630483
// extracted to a mask.
30487-
MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements());
30484+
MVT MaskVT = MVT::getVectorVT(MVT::i1, NumElts);
3048830485
V0 = DAG.getBitcast(VT, V0);
3048930486
V1 = DAG.getBitcast(VT, V1);
3049030487
Sel = DAG.getBitcast(VT, Sel);
@@ -30611,7 +30608,7 @@ static SDValue LowerShift(SDValue Op, const X86Subtarget &Subtarget,
3061130608
// On SSE41 targets we can use PBLENDVB which selects bytes based just on
3061230609
// the sign bit.
3061330610
if (UseSSE41) {
30614-
MVT ExtVT = MVT::getVectorVT(MVT::i8, VT.getVectorNumElements() * 2);
30611+
MVT ExtVT = MVT::getVectorVT(MVT::i8, NumElts * 2);
3061530612
V0 = DAG.getBitcast(ExtVT, V0);
3061630613
V1 = DAG.getBitcast(ExtVT, V1);
3061730614
Sel = DAG.getBitcast(ExtVT, Sel);

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