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nikolaypanchenkonikolaypanchenko
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-56
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3 files changed

+20
-56
lines changed

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1114,7 +1114,7 @@ void VPWidenRecipe::print(raw_ostream &O, const Twine &Indent,
11141114

11151115
void VPWidenEVLRecipe::print(raw_ostream &O, const Twine &Indent,
11161116
VPSlotTracker &SlotTracker) const {
1117-
O << Indent << "WIDEN vp ";
1117+
O << Indent << "WIDEN-VP ";
11181118
printAsOperand(O, SlotTracker);
11191119
O << " = " << Instruction::getOpcodeName(getOpcode());
11201120
printFlags(O);

‎llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll

Lines changed: 18 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -24,13 +24,11 @@ define void @test_and(ptr nocapture %a, ptr nocapture readonly %b) {
2424
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
2525
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
2626
; IF-EVL: [[VECTOR_PH]]:
27-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
28-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
2927
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
3028
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
3129
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
3230
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
33-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
31+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
3432
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
3533
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
3634
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -120,13 +118,11 @@ define void @test_or(ptr nocapture %a, ptr nocapture readonly %b) {
120118
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
121119
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
122120
; IF-EVL: [[VECTOR_PH]]:
123-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
124-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
125121
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
126122
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
127123
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
128124
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
129-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
125+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
130126
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
131127
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
132128
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -216,13 +212,11 @@ define void @test_xor(ptr nocapture %a, ptr nocapture readonly %b) {
216212
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
217213
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
218214
; IF-EVL: [[VECTOR_PH]]:
219-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
220-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
221215
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
222216
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
223217
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
224218
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
225-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
219+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
226220
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
227221
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
228222
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -312,13 +306,11 @@ define void @test_shl(ptr nocapture %a, ptr nocapture readonly %b) {
312306
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
313307
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
314308
; IF-EVL: [[VECTOR_PH]]:
315-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
316-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
317309
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
318310
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
319311
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
320312
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
321-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
313+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
322314
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
323315
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
324316
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -408,13 +400,11 @@ define void @test_lshr(ptr nocapture %a, ptr nocapture readonly %b) {
408400
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
409401
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
410402
; IF-EVL: [[VECTOR_PH]]:
411-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
412-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
413403
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
414404
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
415405
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
416406
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
417-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
407+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
418408
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
419409
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
420410
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -504,13 +494,11 @@ define void @test_ashr(ptr nocapture %a, ptr nocapture readonly %b) {
504494
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
505495
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
506496
; IF-EVL: [[VECTOR_PH]]:
507-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
508-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
509497
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
510498
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
511499
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
512500
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
513-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
501+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
514502
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
515503
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
516504
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -600,13 +588,11 @@ define void @test_add(ptr nocapture %a, ptr nocapture readonly %b) {
600588
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
601589
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
602590
; IF-EVL: [[VECTOR_PH]]:
603-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
604-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
605591
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
606592
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
607593
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
608594
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
609-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
595+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
610596
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
611597
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
612598
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -696,13 +682,11 @@ define void @test_sub(ptr nocapture %a, ptr nocapture readonly %b) {
696682
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
697683
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
698684
; IF-EVL: [[VECTOR_PH]]:
699-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
700-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
701685
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
702686
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
703687
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
704688
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
705-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
689+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
706690
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
707691
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
708692
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -792,13 +776,11 @@ define void @test_mul(ptr nocapture %a, ptr nocapture readonly %b) {
792776
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
793777
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
794778
; IF-EVL: [[VECTOR_PH]]:
795-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
796-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
797779
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
798780
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
799781
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
800782
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
801-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
783+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
802784
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
803785
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
804786
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -888,13 +870,11 @@ define void @test_sdiv(ptr nocapture %a, ptr nocapture readonly %b) {
888870
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
889871
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
890872
; IF-EVL: [[VECTOR_PH]]:
891-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
892-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
893873
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
894874
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
895875
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
896876
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
897-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
877+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
898878
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
899879
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
900880
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -984,13 +964,11 @@ define void @test_udiv(ptr nocapture %a, ptr nocapture readonly %b) {
984964
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
985965
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
986966
; IF-EVL: [[VECTOR_PH]]:
987-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
988-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
989967
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
990968
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
991969
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
992970
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
993-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
971+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
994972
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
995973
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
996974
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -1080,13 +1058,11 @@ define void @test_srem(ptr nocapture %a, ptr nocapture readonly %b) {
10801058
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
10811059
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
10821060
; IF-EVL: [[VECTOR_PH]]:
1083-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
1084-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
10851061
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
10861062
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
10871063
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
10881064
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
1089-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
1065+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
10901066
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
10911067
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
10921068
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -1176,13 +1152,11 @@ define void @test_urem(ptr nocapture %a, ptr nocapture readonly %b) {
11761152
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
11771153
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
11781154
; IF-EVL: [[VECTOR_PH]]:
1179-
; IF-EVL-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
1180-
; IF-EVL-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 16
11811155
; IF-EVL-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
11821156
; IF-EVL-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 16
11831157
; IF-EVL-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], 1
11841158
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP7]]
1185-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP4]]
1159+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP6]]
11861160
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
11871161
; IF-EVL-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
11881162
; IF-EVL-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
@@ -1275,13 +1249,11 @@ define void @test_fadd(ptr nocapture %a, ptr nocapture readonly %b) {
12751249
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]]
12761250
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
12771251
; IF-EVL: [[VECTOR_PH]]:
1278-
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
1279-
; IF-EVL-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
12801252
; IF-EVL-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
12811253
; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4
12821254
; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[TMP7]], 1
12831255
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP8]]
1284-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
1256+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP7]]
12851257
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
12861258
; IF-EVL-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()
12871259
; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 [[TMP9]], 4
@@ -1372,13 +1344,11 @@ define void @test_fsub(ptr nocapture %a, ptr nocapture readonly %b) {
13721344
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]]
13731345
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
13741346
; IF-EVL: [[VECTOR_PH]]:
1375-
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
1376-
; IF-EVL-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
13771347
; IF-EVL-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
13781348
; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4
13791349
; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[TMP7]], 1
13801350
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP8]]
1381-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
1351+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP7]]
13821352
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
13831353
; IF-EVL-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()
13841354
; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 [[TMP9]], 4
@@ -1469,13 +1439,11 @@ define void @test_fmul(ptr nocapture %a, ptr nocapture readonly %b) {
14691439
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]]
14701440
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
14711441
; IF-EVL: [[VECTOR_PH]]:
1472-
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
1473-
; IF-EVL-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
14741442
; IF-EVL-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
14751443
; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4
14761444
; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[TMP7]], 1
14771445
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP8]]
1478-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
1446+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP7]]
14791447
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
14801448
; IF-EVL-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()
14811449
; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 [[TMP9]], 4
@@ -1566,13 +1534,11 @@ define void @test_fdiv(ptr nocapture %a, ptr nocapture readonly %b) {
15661534
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]]
15671535
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
15681536
; IF-EVL: [[VECTOR_PH]]:
1569-
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
1570-
; IF-EVL-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
15711537
; IF-EVL-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
15721538
; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4
15731539
; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[TMP7]], 1
15741540
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP8]]
1575-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
1541+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP7]]
15761542
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
15771543
; IF-EVL-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()
15781544
; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 [[TMP9]], 4
@@ -1716,13 +1682,11 @@ define void @test_fneg(ptr nocapture %a, ptr nocapture readonly %b) {
17161682
; IF-EVL-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP3]], [[TMP2]]
17171683
; IF-EVL-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
17181684
; IF-EVL: [[VECTOR_PH]]:
1719-
; IF-EVL-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
1720-
; IF-EVL-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
17211685
; IF-EVL-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
17221686
; IF-EVL-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4
17231687
; IF-EVL-NEXT: [[TMP8:%.*]] = sub i64 [[TMP7]], 1
17241688
; IF-EVL-NEXT: [[N_RND_UP:%.*]] = add i64 100, [[TMP8]]
1725-
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
1689+
; IF-EVL-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP7]]
17261690
; IF-EVL-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
17271691
; IF-EVL-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()
17281692
; IF-EVL-NEXT: [[TMP10:%.*]] = mul i64 [[TMP9]], 4

‎llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ define void @foo(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
3131
; IF-EVL-NEXT: CLONE ir<[[GEP2:%.+]]> = getelementptr inbounds ir<%c>, vp<[[ST]]>
3232
; IF-EVL-NEXT: vp<[[PTR2:%[0-9]+]]> = vector-pointer ir<[[GEP2]]>
3333
; IF-EVL-NEXT: WIDEN ir<[[LD2:%.+]]> = vp.load vp<[[PTR2]]>, vp<[[EVL]]>
34-
; IF-EVL-NEXT: WIDEN vp ir<[[ADD:%.+]]> = add nsw ir<[[LD2]]>, ir<[[LD1]]>
34+
; IF-EVL-NEXT: WIDEN-VP ir<[[ADD:%.+]]> = add nsw ir<[[LD2]]>, ir<[[LD1]]>
3535
; IF-EVL-NEXT: CLONE ir<[[GEP3:%.+]]> = getelementptr inbounds ir<%a>, vp<[[ST]]>
3636
; IF-EVL-NEXT: vp<[[PTR3:%[0-9]+]]> = vector-pointer ir<[[GEP3]]>
3737
; IF-EVL-NEXT: WIDEN vp.store vp<[[PTR3]]>, ir<[[ADD]]>, vp<[[EVL]]>

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