Skip to content

Commit 7b5a459

Browse files
authored
[RISCV] Just reporting an error shouldn't generate a crash diagnostic (#134040)
Wanting to examine some of generated code, I tried MCA with the command: ~~~bash llvm-mca -mtriple=riscv32-unknown-unknown -mcpu=rocket -iterations=300 core_list_join.s ~~~ I was greeted with the following error message: ~~~ LLVM ERROR: RV32 target requires an RV32 CPU PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace. Stack dump: … ~~~ On beginning to investigate the “bug”, I discovered that the code was simply attempting to report a user error. It used report_fatal_error() to do so but with the “bool GenCrashDiag” argument enabled (the default). This tiny change adds a wrapper function which calls report_fatal_error() as before but with GenCrashDiag disabled.
1 parent 88b6229 commit 7b5a459

File tree

2 files changed

+16
-8
lines changed

2 files changed

+16
-8
lines changed

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp

Lines changed: 13 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,14 @@ namespace RISCV {
5151
#include "RISCVGenSearchableTables.inc"
5252
} // namespace RISCV
5353

54+
// Report an error but don't ask the user to report a bug.
55+
[[noreturn]] static void reportError(const char *Reason) {
56+
report_fatal_error(Reason, /*gen_crash_diag=*/false);
57+
}
58+
[[noreturn]] static void reportError(Error Err) {
59+
report_fatal_error(std::move(Err), /*gen_crash_diag=*/false);
60+
}
61+
5462
namespace RISCVABI {
5563
ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
5664
StringRef ABIName) {
@@ -87,15 +95,15 @@ ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
8795
if ((TargetABI == RISCVABI::ABI::ABI_ILP32E ||
8896
(TargetABI == ABI_Unknown && IsRVE && !IsRV64)) &&
8997
FeatureBits[RISCV::FeatureStdExtD])
90-
report_fatal_error("ILP32E cannot be used with the D ISA extension");
98+
reportError("ILP32E cannot be used with the D ISA extension");
9199

92100
if (TargetABI != ABI_Unknown)
93101
return TargetABI;
94102

95103
// If no explicit ABI is given, try to compute the default ABI.
96104
auto ISAInfo = RISCVFeatures::parseFeatureBits(IsRV64, FeatureBits);
97105
if (!ISAInfo)
98-
report_fatal_error(ISAInfo.takeError());
106+
reportError(ISAInfo.takeError());
99107
return getTargetABI((*ISAInfo)->computeDefaultABI());
100108
}
101109

@@ -127,12 +135,12 @@ namespace RISCVFeatures {
127135

128136
void validate(const Triple &TT, const FeatureBitset &FeatureBits) {
129137
if (TT.isArch64Bit() && !FeatureBits[RISCV::Feature64Bit])
130-
report_fatal_error("RV64 target requires an RV64 CPU");
138+
reportError("RV64 target requires an RV64 CPU");
131139
if (!TT.isArch64Bit() && !FeatureBits[RISCV::Feature32Bit])
132-
report_fatal_error("RV32 target requires an RV32 CPU");
140+
reportError("RV32 target requires an RV32 CPU");
133141
if (FeatureBits[RISCV::Feature32Bit] &&
134142
FeatureBits[RISCV::Feature64Bit])
135-
report_fatal_error("RV32 and RV64 can't be combined");
143+
reportError("RV32 and RV64 can't be combined");
136144
}
137145

138146
llvm::Expected<std::unique_ptr<RISCVISAInfo>>

llvm/test/MC/RISCV/target-abi-invalid.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
# RUN: | FileCheck -check-prefix=RV32E-LP64 %s
3131
# RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi lp64f < %s 2>&1 \
3232
# RUN: | FileCheck -check-prefix=RV32EF-LP64F %s
33-
# RUN: not --crash llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi lp64f < %s 2>&1 \
33+
# RUN: not llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi lp64f < %s 2>&1 \
3434
# RUN: | FileCheck -check-prefix=RV32EFD-LP64D %s
3535
# RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi lp64e %s 2>&1 \
3636
# RUN: | FileCheck -check-prefix=RV32E-LP64E %s
@@ -70,9 +70,9 @@
7070
# RUN: | FileCheck -check-prefix=RV32EF-ILP32F %s
7171
# RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi ilp32f < %s 2>&1 \
7272
# RUN: | FileCheck -check-prefix=RV32EF-ILP32F %s
73-
# RUN: not --crash llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32f < %s 2>&1 \
73+
# RUN: not llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32f < %s 2>&1 \
7474
# RUN: | FileCheck -check-prefix=RV32EFD-ILP32F %s
75-
# RUN: not --crash llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32d < %s 2>&1 \
75+
# RUN: not llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32d < %s 2>&1 \
7676
# RUN: | FileCheck -check-prefix=RV32EFD-ILP32D %s
7777

7878
# RV32E-ILP32: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)

0 commit comments

Comments
 (0)