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Address review comments
- Improve comment according to suggestion - Generate test with `--check-globals=none` - Use VF=2 for more compact IR in test
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llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 2 additions & 1 deletion
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@@ -1105,7 +1105,8 @@ static bool optimizeVectorInductionWidthForTCAndVFUF(VPlan &Plan,
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if (!TC || !BestVF.isFixed())
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return false;
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// Calculate the widest type required for known TC, VF and UF.
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// Calculate the minimum power-of-2 bit width that can fit the known TC, VF
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// and UF. Returns at least 8.
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auto ComputeBitWidth = [](APInt TC, uint64_t Align) {
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APInt AlignedTC =
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Align * APIntOps::RoundingUDiv(TC, APInt(TC.getBitWidth(), Align),

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