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Co-authored-by: Matt Arsenault <[email protected]>

Author: spavloff

llvm/lib/Target/ARM/ARMInstructionSelector.cpp

@@ -1109,7 +1109,7 @@ bool ARMInstructionSelector::select(MachineInstr &I) {
       MachineInstr *Ptr = MRI.getVRegDef(PtrReg);
       if (Ptr->getOpcode() == TargetOpcode::G_CONSTANT_POOL) {
         const MachineOperand &Index = Ptr->getOperand(1);
-        unsigned Opcode = (Subtarget->isThumb()) ? ARM::tLDRpci : ARM::LDRcp;
+        unsigned Opcode = Subtarget->isThumb() ? ARM::tLDRpci : ARM::LDRcp;
 
         auto Instr = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Opcode))
                          .addDef(Reg)