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[RISCV] Combine repeated calls to MachineFunction::getSubtarget. NFC
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llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -270,8 +270,9 @@ void RISCVRegisterInfo::lowerVSPILL(MachineBasicBlock::iterator II) const {
270270
MachineBasicBlock &MBB = *II->getParent();
271271
MachineFunction &MF = *MBB.getParent();
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MachineRegisterInfo &MRI = MF.getRegInfo();
273-
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
274-
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
273+
const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
274+
const TargetInstrInfo *TII = STI.getInstrInfo();
275+
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
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auto ZvlssegInfo = RISCV::isRVVSpillForZvlsseg(II->getOpcode());
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unsigned NF = ZvlssegInfo->first;
@@ -303,7 +304,6 @@ void RISCVRegisterInfo::lowerVSPILL(MachineBasicBlock::iterator II) const {
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304305
Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass);
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// Optimize for constant VLEN.
306-
const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
307307
if (STI.getRealMinVLen() == STI.getRealMaxVLen()) {
308308
const int64_t VLENB = STI.getRealMinVLen() / 8;
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int64_t Offset = VLENB * LMUL;
@@ -347,8 +347,9 @@ void RISCVRegisterInfo::lowerVRELOAD(MachineBasicBlock::iterator II) const {
347347
MachineBasicBlock &MBB = *II->getParent();
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MachineFunction &MF = *MBB.getParent();
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MachineRegisterInfo &MRI = MF.getRegInfo();
350-
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
351-
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
350+
const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
351+
const TargetInstrInfo *TII = STI.getInstrInfo();
352+
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
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353354
auto ZvlssegInfo = RISCV::isRVVSpillForZvlsseg(II->getOpcode());
354355
unsigned NF = ZvlssegInfo->first;
@@ -380,7 +381,6 @@ void RISCVRegisterInfo::lowerVRELOAD(MachineBasicBlock::iterator II) const {
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381382
Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass);
382383
// Optimize for constant VLEN.
383-
const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
384384
if (STI.getRealMinVLen() == STI.getRealMaxVLen()) {
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const int64_t VLENB = STI.getRealMinVLen() / 8;
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int64_t Offset = VLENB * LMUL;

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